公开(公告)号：US20230217027A1

公开(公告)日：2023-07-06

申请号：US17892139

申请日：2022-08-22

Applicant: MEDIATEK INC.

Inventor： Tung-Hsing Wu ,  Ping-Han Lee ,  Tzu-Yun Tseng

IPC: H04N19/14 ,  H04N19/182 ,  H04N19/172

CPC classification number: H04N19/14 ,  H04N19/182 ,  H04N19/172

Abstract: A video encoding apparatus includes a content activity analyzer circuit and a video encoder circuit. The content activity analyzer circuit applies a content activity analysis process to consecutive frames, to generate content activity analysis results. The consecutive frames are derived from input frames of the video encoding apparatus. The content activity analysis process includes: deriving a first content activity analysis result according to a first frame and a second frame in the consecutive frames, wherein the first content activity analysis result includes a processed frame distinct from the second frame; and deriving a second content activity analysis result according to a third frame included in the consecutive frames and the processed frame. The video encoder circuit performs a video encoding process to generate a bitstream output of the video encoding apparatus, wherein information derived from the content activity analysis results is referenced by the video encoding process.

公开(公告)号：US20240388717A1

公开(公告)日：2024-11-21

申请号：US18784857

申请日：2024-07-25

Applicant: MEDIATEK INC.

Inventor： Chin-Jung Yang ,  Chun-Kai Huang ,  Ping-Han Lee ,  Tzu-Yun Tseng ,  Tung-Hsing Wu

IPC: H04N19/14 ,  H04N19/12 ,  H04N19/172 ,  H04N19/70 ,  H04N19/85

Abstract: A video encoding apparatus includes a content activity analyzer circuit and a video encoder circuit. The content activity analyzer circuit applies a content activity analysis process to a plurality of frames, and generate a plurality of content activity analysis results, wherein the plurality of frames are derived from a plurality of input frames of the video encoding apparatus. The video encoder circuit performs a video encoding process to generate a bitstream output of the video encoding apparatus. At least one frame is not encoded into the bitstream output according to the plurality of content activity analysis results.

公开(公告)号：US12160584B2

公开(公告)日：2024-12-03

申请号：US17892139

申请日：2022-08-22

Applicant: MEDIATEK INC.

Inventor： Tung-Hsing Wu ,  Ping-Han Lee ,  Tzu-Yun Tseng

IPC: H04N11/02 ,  H04N19/14 ,  H04N19/172 ,  H04N19/182

Abstract: A video encoding apparatus includes a content activity analyzer circuit and a video encoder circuit. The content activity analyzer circuit applies a content activity analysis process to consecutive frames, to generate content activity analysis results. The consecutive frames are derived from input frames of the video encoding apparatus. The content activity analysis process includes: deriving a first content activity analysis result according to a first frame and a second frame in the consecutive frames, wherein the first content activity analysis result includes a processed frame distinct from the second frame; and deriving a second content activity analysis result according to a third frame included in the consecutive frames and the processed frame. The video encoder circuit performs a video encoding process to generate a bitstream output of the video encoding apparatus, wherein information derived from the content activity analysis results is referenced by the video encoding process.