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公开(公告)号：US10790853B2
公开(公告)日：2020-09-29
申请号：US16199216
申请日：2018-11-25
Applicant: MediaTek Inc.
Inventor： Mao-Ching Chiu , Chong-You Lee , Cheng-Yi Hsu , Timothy Perrin Fisher-Jeffes , Yen-Shuo Chang , Wei-Jen Chen , Ju-Ya Chen
Abstract: Concepts and schemes pertaining to quasi-cyclic-low-density parity-check (QC-LDPC) coding are described. A processor of an apparatus may generate a QC-LDPC code having a plurality of codebooks embedded therein. The processor may select a codebook from the plurality of codebooks. The processor may also encode data using the selected codebook. Alternatively or additionally, the processor may generate the QC-LDPC code including at least one quasi-row orthogonal layer. Alternatively or additionally, the processor may generate the QC-LDPC code including a base matrix a portion of which forming a kernel matrix that corresponds to a code rate of at least a threshold value.
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22.发明申请公开(公告)号：US20180331784A1
公开(公告)日：2018-11-15
申请号：US15995093
申请日：2018-05-31
Applicant: MediaTek Inc.
Inventor： Mao-Ching Chiu , Chong-You Lee , Timothy Perrin Fisher-Jeffes , Cheng-Yi Hsu , Yen-Shuo Chang , Wei-Jen Chen , Ju-Ya Chen
IPC: H04L1/00 , H03M13/11 , H04B7/0456
CPC classification number: H04L1/0058 , H03M13/1137 , H03M13/114 , H03M13/116 , H03M13/1188 , H03M13/6306 , H03M13/6393 , H03M13/6516 , H04B7/0456 , H04L1/0041 , H04L1/0057 , H04L1/0068
Abstract: A processor of an apparatus selects a codebook from a plurality of codebooks embedded in a quasi-cyclic-low-density parity-check (QC-LDPC) code. The processor stores the selected codebook in a memory associated with the processor. The processor also encodes data using the selected codebook to generate a plurality of modulation symbols of the data. The processor further controls a transmitter of the apparatus to multiplex, convert, filter, amplify and radiate the modulation symbols as electromagnetic waves through one or more antennas of the apparatus. In selecting the codebook from the plurality of codebooks embedded in the QC-LDPC code, the processor selects the codebook according to one or more rules such that a small codebook requiring a shorter amount of processing latency for the encoding is selected for the encoding unless a larger codebook corresponding to a larger amount of processing latency for the encoding is necessary for the encoding.
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公开(公告)号：US20170077968A1
公开(公告)日：2017-03-16
申请号：US14854067
申请日：2015-09-15
Applicant: MEDIATEK Inc.
Inventor： Cheng-Yi Hsu , Mao-Ching Chiu , Wei-Nan Sun
CPC classification number: H04B1/0475 , H04B7/0452 , H04L25/03891 , H04L27/0012
Abstract: An apparatus for interference cancellation includes: a front end processing circuit, for receiving at least an interference signal and a desire signal; an inner processing circuit, for channel/noise estimation and for suppressing the interference signal; and a MIMO (multi-input multi-output) processing circuit, for blindly detecting an interference parameter of the interference signal based on the suppressed interference signal, and for jointly cancelling the interference signal from the desire signal and for demodulating the desire signal based on the detected interference parameter and the channel/noise estimation from the inner processing circuit.
Abstract translation: 用于干扰消除的装置包括：用于至少接收干扰信号和期望信号的前端处理电路; 内部处理电路，用于信道/噪声估计并用于抑制干扰信号; 以及MIMO（多输入多输出）处理电路，用于基于所抑制的干扰信号盲目地检测干扰信号的干扰参数，并且从所述期望信号共同抵消干扰信号，并基于 检测到的干扰参数和来自内部处理电路的信道/噪声估计。
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公开(公告)号：US11528035B2
公开(公告)日：2022-12-13
申请号：US17343618
申请日：2021-06-09
Applicant: MediaTek Inc.
Inventor： Tun-Ping Huang , Mao-Ching Chiu , Wei-De Wu , Chia-Wei Tai , Tien-Yu Lin
Abstract: Examples pertaining to bit selection for polar coding incremental-redundancy hybrid automatic repeat request (IR-HARQ) are described. An apparatus (e.g., UE) generates a re-transmission polar code block (CB) in a polar incremental redundancy HARQ (IR-HARQ) procedure. The apparatus then transmits the re-transmission polar CB as a re-transmission of an initial transmission of an initial polar code carrying a plurality of information bits. In generating the re-transmission polar CB, the apparatus selects one or more re-transmission information bits from the plurality of information bits.
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公开(公告)号：US10958290B2
公开(公告)日：2021-03-23
申请号：US16543783
申请日：2019-08-19
Applicant: MediaTek Inc.
Inventor： Wei-Jen Chen , Ju-Ya Chen , Yen-Shuo Chang , Timothy Perrin Fisher-Jeffes , Mao-Ching Chiu , Cheng-Yi Hsu , Chong-You Lee
Abstract: Concepts and schemes pertaining to location of interleaver with low-density parity-check (LDPC) code are described. A processor of an apparatus encodes data to provide a stream of encoded data. The processor also rate matches the encoded data to provide a rate-matched stream of encoded data. The processor further interleaving the rate-matched stream of encoded data. In rate matching the encoded data, the processor buffers the stream of encoded data in a circular buffer, with the circular buffer functioning as a rate matching block that rate matches the stream of encoded data. In interleaving the rate-matched stream of encoded data, the processor performs bit-level interleaving on the rate-matched stream of encoded data to provide a stream of interleaved data.
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Patent Agency Ranking
公开(公告)号：US10432234B2
公开(公告)日：2019-10-01
申请号：US15653048
申请日：2017-07-18
Applicant: MEDIATEK INC.
Inventor： Wei-De Wu , Chia-Wei Tai , Mao-Ching Chiu
Abstract: Aspects of the disclosure provide polar code rate matching methods. A first method can include determining whether to puncture or shorten a mother polar code according to a mother code rate and/or a rate matched code rate, and selecting K positions in the sequence of N input bits for input of K information bits to a polar encoder according to an offline prepared index list ordered according to the reliabilities of respective synthesized channels. Frozen input bits caused by puncturing or shortening are skipped during the selection. A second method includes generating a mother polar code, rearranging code bits of the mother polar code to form a rearranged sequence that can be stored in a circular buffer, and performing, in a unified way, one of puncturing, shortening, or repetition on the rearranged sequence to obtain a rate matched code.
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公开(公告)号：US10171204B2
公开(公告)日：2019-01-01
申请号：US15595189
申请日：2017-05-15
Applicant: MEDIATEK INC.
Inventor： Wei-De Wu , Mao-Ching Chiu
Abstract: Aspects of the disclosure provide a method for polar code puncturing. The method can include receiving a mother polar code including a sequence of coded bits, the sequence of coded bits having indices {0, . . . , N−1} and including at least a first block of coded bits having indices {0, . . . , i−1}, a second block of coded bits having indices {i, . . . , i+k−1}, a third block of coded bits having indices {i+k, . . . , i+k+k−1}, interleaving the second block of coded bits with the third block of coded bits to form a rearranged sequence of coded bits including the N coded bits, and extracting the last M coded bits from the rearranged sequence of coded bits to generate a punctured code having a length of M.
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28.发明申请公开(公告)号：US20180331698A1
公开(公告)日：2018-11-15
申请号：US16019947
申请日：2018-06-27
Applicant: MediaTek Inc.
Inventor： Chong-You Lee , Timothy Perrin Fisher-Jeffes , Mao-Ching Chiu , Wei-Jen Chen , Ju-Ya Chen
CPC classification number: H03M13/1168 , H03M13/033 , H03M13/036 , H03M13/116 , H03M13/616 , H03M13/6306 , H03M13/6362 , H03M13/6508 , H03M13/6516 , H04L1/0041 , H04L1/0057 , H04L1/0068 , H04L1/1819
Abstract: A processor of an apparatus establishes a wireless communication link with at least one other apparatus via a transceiver of the apparatus. The processor wirelessly communicates with the other apparatus via the wireless communication link by: selecting a first shift-coefficient table from a plurality of shift-coefficient tables; generating a QC-LDPC code using a base matrix and at least a portion of the first shift-coefficient table; selecting a codebook from a plurality of codebooks embedded in the QC-LDPC code; storing the selected codebook in a memory associated with the processor; encoding data using the selected codebook to generate a plurality of modulation symbols of the data; and controlling the transceiver to multiplex, convert, filter, amplify and radiate the modulation symbols as electromagnetic waves through one or more antennas of the apparatus to transmit the modulation symbols of the data to the other apparatus via the wireless communication link.
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公开(公告)号：US20180212626A1
公开(公告)日：2018-07-26
申请号：US15878350
申请日：2018-01-23
Applicant: MediaTek Inc.
Inventor： Wei-Jen Chen , Ju-Ya Chen , Yen-Shuo Chang , Timothy Perrin Fisher-Jeffes , Mao-Ching Chiu , Cheng-Yi Hsu , Chong-You Lee
Abstract: Concepts and schemes pertaining to location of interleaver with low-density parity-check (LDPC) code are described. A processor of an apparatus encodes data to provide a stream of encoded data. The processor also rate matches the encoded data to provide a rate-matched stream of encoded data. The processor further interleaving the rate-matched stream of encoded data. In rate matching the encoded data, the processor buffers the stream of encoded data in a circular buffer, with the circular buffer functioning as a rate matching block that rate matches the stream of encoded data. In interleaving the rate-matched stream of encoded data, the processor performs bit-level interleaving on the rate-matched stream of encoded data to provide a stream of interleaved data.
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公开(公告)号：US20170331590A1
公开(公告)日：2017-11-16
申请号：US15595189
申请日：2017-05-15
Applicant: MEDIATEK INC.
Inventor： Wei-De WU , Mao-Ching Chiu
CPC classification number: H04L1/0058 , H03M13/005 , H03M13/13 , H03M13/2792 , H03M13/6362 , H04L1/0041 , H04L1/0068 , H04L1/1819
Abstract: Aspects of the disclosure provide a method for polar code puncturing. The method can include receiving a mother polar code including a sequence of coded bits, the sequence of coded bits having indices {0, . . . , N−1} and including at least a first block of coded bits having indices {0, . . . , i−1}, a second block of coded bits having indices {i, . . . , i+k−1}, a third block of coded bits having indices {i+k, i+k+k−1}, interleaving the second block of coded bits with the third block of coded bits to form a rearranged sequence of coded bits including the N coded bits, and extracting the last M coded bits from the rearranged sequence of coded bits to generate a punctured code having a length of M.
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