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    Efficient QoS support for software packet processing on general purpose servers
    21.
    发明授权
    Efficient QoS support for software packet processing on general purpose servers 有权

    公开(公告)号：US10237171B2

    公开(公告)日：2019-03-19

    申请号：US15270377

    申请日：2016-09-20

    Applicant: INTEL CORPORATION

    Inventor： Sameh Gobriel ,  Ren Wang ,  Eric K. Mann ,  Christian Maciocco ,  Tsung-Yuan C. Tai

    IPC: H04L1/00 ,  H04L12/721 ,  H04L12/851 ,  H04L12/863 ,  H04L12/751 ,  H04L12/715

    Abstract: Methods and apparatus for facilitating efficient Quality of Service (QoS) support for software-based packet processing by offloading QoS rate-limiting to NIC hardware. Software-based packet processing is performed on packet flows received at a compute platform, such as a general purpose server, and/or packet flows generated by local applications running on the compute platform. The packet processing includes packet classification that associates packets with packet flows using flow IDs, and identifying a QoS class for the packet and packet flow. NIC Tx queues are dynamically configured or pre-configured to effect rate limiting for forwarding packets enqueued in the NIC Tx queues. New packet flows are detected, and mapping data is created to map flow IDs associated with flows to the NIC Tx queues used to forward the packets associated with the flows.

    LOADING DATA USING SUB-THREAD INFORMATION IN A PROCESSOR
    23.
    发明申请
    LOADING DATA USING SUB-THREAD INFORMATION IN A PROCESSOR 审中-公开
    在处理器中使用子螺纹信息加载数据

    公开(公告)号：US20170039144A1

    公开(公告)日：2017-02-09

    申请号：US14820802

    申请日：2015-08-07

    Applicant: Intel Corporation

    Inventor： Ren Wang ,  Kevin B. Theobald ,  Sameh Gobriel ,  Tsung-Yuan C. Tai

    IPC: G06F12/12 ,  G06F12/08

    CPC classification number: G06F12/123 ,  G06F12/0875 ,  G06F12/126 ,  G06F2212/1021 ,  G06F2212/30 ,  G06F2212/452 ,  G06F2212/602

    Abstract: In one embodiment, a processor includes a core to execute instructions, a cache memory coupled to the core, and a cache controller coupled to the cache memory. The cache controller, responsive to a first load request having a first priority level, is to insert data of the first load request into a first entry of the cache memory and set an age indicator of a metadata field of the first entry to a first age level, the first age level greater than a default age level of a cache insertion policy for load requests, and responsive to a second load request having a second priority level to insert data of the second load request into a second entry of the cache memory and to set an age indicator of a metadata field of the second entry to the default age level, the first and second load requests of a first thread. Other embodiments are described and claimed.

    Abstract translation: 在一个实施例中，处理器包括执行指令的核心，耦合到核心的高速缓冲存储器以及耦合到高速缓存存储器的高速缓存控制器。 高速缓存控制器响应于具有第一优先级的第一加载请求，将第一加载请求的数据插入到高速缓冲存储器的第一条目中，并将第一条目的元数据字段的年龄指示符设置为第一年龄 级别，所述第一年龄级别大于用于加载请求的高速缓存插入策略的默认年龄级别，并响应于具有第二优先级的第二加载请求，以将所述第二加载请求的数据插入所述高速缓存存储器的第二条目;以及 将第二条目的元数据字段的年龄指示符设置为默认年龄级别，第一线程的第一和第二加载请求。 描述和要求保护其他实施例。

    Technologies for flow rule aware exact match cache compression
    25.
    发明授权
    Technologies for flow rule aware exact match cache compression 有权

    公开(公告)号：US11201940B2

    公开(公告)日：2021-12-14

    申请号：US15862311

    申请日：2018-01-04

    Applicant: Intel Corporation

    Inventor： Yipeng Wang ,  Ren Wang ,  Antonio Fischetti ,  Sameh Gobriel ,  Tsung-Yuan C. Tai

    IPC: H04L12/24 ,  H04L29/08 ,  H04L29/06 ,  H04L12/26 ,  G06F9/455

    Abstract: Technologies for flow rule aware exact match cache compression include multiple computing devices in communication over a network. A computing device reads a network packet from a network port and extracts one or more key fields from the packet to generate a lookup key. The key fields are identified by a key field specification of an exact match flow cache. The computing device may dynamically configure the key field specification based on an active flow rule set. The computing device may compress the key field specification to match a union of non-wildcard fields of the active flow rule set. The computing device may expand the key field specification in response to insertion of a new flow rule. The computing device looks up the lookup key in the exact match flow cache and, if a match is found, applies the corresponding action. Other embodiments are described and claimed.

    Flow classification apparatus, methods, and systems
    26.
    发明授权
    Flow classification apparatus, methods, and systems 有权

    公开(公告)号：US11088951B2

    公开(公告)日：2021-08-10

    申请号：US15638102

    申请日：2017-06-29

    Applicant: Intel Corporation

    Inventor： Ren Wang ,  Tsung-Yuan C. Tai ,  Yipeng Wang ,  Sameh Gobriel

    IPC: H04L12/743 ,  H04L12/851 ,  H04L12/741 ,  H04L29/12 ,  H04L12/751

    Abstract: Apparatus, methods, and systems for tuple space search-based flow classification using cuckoo hash tables and unmasked packet headers are described herein. A device can communicate with one or more hardware switches. The device can include memory to store hash table entries of a hash table. The device can include processing circuitry to perform a hash lookup in the hash table. The lookup can be based on an unmasked key include in a packet header corresponding to a received data packet. The processing circuitry can retrieve an index pointing to a sub-table, the sub-table including a set of rules for handling the data packet. Other embodiments are also described.

    Compute node cluster based routing method and apparatus
    27.
    发明授权
    Compute node cluster based routing method and apparatus 有权

    公开(公告)号：US10938712B2

    公开(公告)日：2021-03-02

    申请号：US15433758

    申请日：2017-02-15

    Applicant: Intel Corporation

    Inventor： Ken Schumm ,  Sameh Gobriel ,  Asif H. Haswarey ,  Tsung-Yuan Charlie Tai

    IPC: H04L12/703 ,  H04L12/715 ,  H04L12/741

    Abstract: Apparatus and method to facilitate networked compute node cluster routing are disclosed herein. In some embodiments, a compute node for cluster compute may include one or more input ports to receive data packets from first selected ones of a cluster of compute nodes; one or more output ports to route data packets to second selected ones of the cluster of computer nodes; and one or more processors, wherein the one or more processors includes logic to determine a particular output port, of the one or more output ports, to which a data packet received at the one or more input ports is to be routed, and wherein the logic is to exclude output ports associated with links indicated in fault status information as having a fault status to be the particular output port to which the data packet is to be routed.

    Technologies for efficient network flow classification with vector bloom filters
    28.
    发明授权
    Technologies for efficient network flow classification with vector bloom filters 有权

    公开(公告)号：US10313240B2

    公开(公告)日：2019-06-04

    申请号：US15632592

    申请日：2017-06-26

    Applicant: Intel Corporation

    Inventor： Sameh Gobriel ,  Wei Shen ,  Tsung-Yuan C. Tai ,  Ren Wang

    IPC: H04L12/927 ,  H04L12/743 ,  H04L12/741 ,  H04L29/12 ,  H04L12/755

    Abstract: Technologies for efficient network flow classification include a computing device that receives a network packet that includes a header. The computing device generates a vector Bloom filter (VBF) key as a function of the header and searches multiple VBFs for a VBF that matches the VBF key. Each VBF is associated with a flow sub-table that includes one or more flow rules. Each flow sub-table is associated with a mask length. If a matching VBF is found, the computing device searches the corresponding flow sub-table for a flow rule that matches a masked header of the network packet. If no matching VBF is found or if no matching flow rule is found, the computing device searches all of the flow sub-tables for a flow rule that matches the header. The computing device applies a flow action of a matching flow rule. Other embodiments are described and claimed.

    Technologies for distributed routing table lookup
    30.
    发明授权
    Technologies for distributed routing table lookup 有权

    公开(公告)号：US09847935B2

    公开(公告)日：2017-12-19

    申请号：US14264912

    申请日：2014-04-29

    Applicant: Intel Corporation

    Inventor： Sameh Gobriel ,  Ren Wang ,  Christian Maciocco ,  Tsung-Yuan Tai

    IPC: H04L12/721 ,  H04L12/755 ,  H04L12/743 ,  H04L12/751 ,  H04L12/725

    CPC classification number: H04L45/44 ,  H04L45/02 ,  H04L45/021 ,  H04L45/306 ,  H04L45/7453

    Abstract: Technologies for distributed table lookup via a distributed router includes an ingress computing node, an intermediate computing node, and an egress computing node. Each computing node of the distributed router includes a forwarding table to store a different set of network routing entries obtained from a routing table of the distributed router. The ingress computing node generates a hash key based on the destination address included in a received network packet. The hash key identifies the intermediate computing node of the distributed router that stores the forwarding table that includes a network routing entry corresponding to the destination address. The ingress computing node forwards the received network packet to the intermediate computing node for routing. The intermediate computing node receives the forwarded network packet, determines a destination address of the network packet, and determines the egress computing node for transmission of the network packet from the distributed router.

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