PARALLEL ENTROPY CODING
    22.
    发明公开

    公开(公告)号:US20240056098A1

    公开(公告)日:2024-02-15

    申请号:US18493404

    申请日:2023-10-24

    CPC classification number: H03M7/6011 H03M7/6005 H03M7/3077

    Abstract: Methods and apparatuses are described to encoded data into a bitstream and to decode data from a bitstream. The method is able to perform parallel encoding and decoding efficiently and avoids padding of substreams thus reducing the amount of bits within the bitstream. Portions of input data channels are multiplexed and encoded into substreams. During the multiplexing shuffling methods are applied in order to obtain substreams of more uniform lengths. The amount of bits within the substream may be further reduced by including only the relevant significant bits within the trailing bits of the encoding process.

    Method of efficient signalling of CBF flags

    公开(公告)号:US11716479B2

    公开(公告)日:2023-08-01

    申请号:US17830875

    申请日:2022-06-02

    CPC classification number: H04N19/186 H04N19/176 H04N19/44 H04N19/60 H04N19/70

    Abstract: A method comprising obtaining a bitstream, the bitstream comprises a transform unit syntax and a coding unit syntax, the transform unit syntax includes a value of a first flag and a value of a second flag related to, respectively, a first chroma transform block and a second chroma transform block of a current transform unit or a current sub-transform unit within the current transform unit, the first or second flag specifies whether the first or second chroma transform block contains at least one transform coefficient levels not equal to 0, the coding unit syntax includes a value of a third flag specifying whether a transform tree structure is present or not; and deriving a value of a fourth flag based on the values of the first, second, and third flags, the fourth flag specifies whether a luma transform block contains at least one transform coefficient levels not equal to 0.

    Image processing apparatus and method

    公开(公告)号:US11202082B2

    公开(公告)日:2021-12-14

    申请号:US17035692

    申请日:2020-09-29

    Abstract: The disclosure relates to an image processing apparatus. The image processing apparatus comprises processing circuitry configured to: obtain a direction angle value associated with the target pixel (12a-c); select for the target pixel (12a-c) a plurality of primary interpolation support pixels (10a-d) from the array of pixels (10a-d) on the basis of the position of the target pixel (12a-c); determine pixel values of a first and a second secondary interpolation support pixels (11ac, 11bd) on the basis of the pixel values of the selected primary interpolation support pixels (10a-d), the direction angle value (a, b) and the position of the target pixel (12a-c); and determine the interpolated pixel value of the target pixel (12a-c) on the basis of the pixel values of the first and second secondary interpolation support pixel (11ac, 11bd) and the position of the target pixel (12a-c).

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