公开(公告)号：US6100100A

公开(公告)日：2000-08-08

申请号：US122239

申请日：1998-07-24

Applicant: Yoshihisa Nagano ,  Yasuhiro Shimada ,  Eiji Fujii

Inventor： Yoshihisa Nagano ,  Yasuhiro Shimada ,  Eiji Fujii

IPC: H01L21/302 ,  H01L21/02 ,  H01L21/306 ,  H01L21/3065 ,  H01L21/3213 ,  H01L21/822 ,  H01L21/8242 ,  H01L27/04 ,  H01L27/108 ,  H01L21/00 ,  H01L21/20

CPC classification number: H01L28/60 ,  H01L21/32136 ,  H01L21/02052 ,  H01L28/55

Abstract: The method of this invention provides a method for manufacturing a capacitor element composed of films. The films have a precise etched shape without a residue that may be generated as a reaction product in a dry-etching process. In this invention, washing in a non-oxidizing atmosphere, inclining a side of a mask for etching or heating a substrate prevents the reaction product from remaining on the film as a residue. The reaction product can be washed away with water, acid or organic solvent in inert gas. The reaction product can be removed from the side of the mask by sputter-etching with ions for dry-etching. The reaction product can be exhausted without adhering to the mask by heating the substrate at a temperature between 100.degree. C. and 400.degree. C.

Abstract translation: 本发明的方法提供一种制造由薄膜构成的电容元件的方法。 这些膜具有精确的蚀刻形状，没有残留物，其可以在干法蚀刻工艺中作为反应产物产生。 在本发明中，在非氧化性气氛中洗涤，倾斜用于蚀刻或加热基材的掩模的侧面防止反应产物残留在膜上。 反应产物可用水，酸或有机溶剂在惰性气体中洗去。 通过溅射蚀刻用离子干法蚀刻，可以从掩模的侧面去除反应产物。 可以在100℃〜400℃的温度下加热基材，而不会粘附在掩模上而使反应产物排出。

公开(公告)号：US6015987A

公开(公告)日：2000-01-18

申请号：US71122

申请日：1998-05-04

Applicant: Koji Arita ,  Eiji Fujii ,  Yasuhiro Shimada ,  Yasuhiro Uemoto ,  Toru Nasu ,  Akihiro Matsuda ,  Yoshihisa Nagano ,  Atsuo Inoue ,  Taketoshi Matsuura ,  Tatsuo Otsuki

Inventor： Koji Arita ,  Eiji Fujii ,  Yasuhiro Shimada ,  Yasuhiro Uemoto ,  Toru Nasu ,  Akihiro Matsuda ,  Yoshihisa Nagano ,  Atsuo Inoue ,  Taketoshi Matsuura ,  Tatsuo Otsuki

IPC: H01L21/02 ,  H01L21/8242 ,  H01L21/8246 ,  H01L27/115 ,  H01L27/108 ,  H01L29/00 ,  H01L29/76 ,  H01L29/94

CPC classification number: H01L27/11502 ,  H01L27/10852 ,  H01L27/11585 ,  H01L27/1159 ,  H01L28/40 ,  H01L28/55 ,  H01L28/60 ,  H01L28/75 ,  Y10S438/958

Abstract: A semiconductor device forming a capacitor through an interlayer insulating layer on a semiconductor substrate on which an integrated circuit is formed. This semiconductor device has an interlayer insulating layer with moisture content of 0.5 g/cm.sup.3 or less, which covers the capacitor in one aspect, and has a passivation layer with hydrogen content of 10.sup.21 atoms/cm.sup.3 or less, which covers the interconnections of the capacitor in other aspect. By thus constituting, deterioration of the capacitor dielectric can be prevented which brings about the electrical reliability of the ferroelectric layer or high dielectric layer.

Abstract translation: 一种通过半导体衬底上的层间绝缘层形成电容器的半导体器件，其上形成集成电路。 该半导体装置具有含水量为0.5g / cm 3以下的层间绝缘层，其在一个方面覆盖电容器，并且具有氢含量为1021原子/ cm3以下的钝化层，其覆盖电容器的互连 在其他方面。 通过这样构成，可以防止导致铁电层或高介电层的电可靠性的电容器电介质的劣化。

公开(公告)号：US5929475A

公开(公告)日：1999-07-27

申请号：US573134

申请日：1995-12-15

Applicant: Yasuhiro Uemoto ,  Eigi Fujii ,  Koji Arita ,  Yoshihisa Nagano ,  Yasuhiro Shimada ,  Masamichi Azuma ,  Atsuo Inoue ,  Yasufumi Izutsu

Inventor： Yasuhiro Uemoto ,  Eigi Fujii ,  Koji Arita ,  Yoshihisa Nagano ,  Yasuhiro Shimada ,  Masamichi Azuma ,  Atsuo Inoue ,  Yasufumi Izutsu

IPC: H01L21/02 ,  H01L21/314 ,  H01L27/115 ,  H01L29/76 ,  H01L27/108 ,  H01L31/062

CPC classification number: H01L27/11502 ,  H01L28/40 ,  H01L28/56

Abstract: A method for fabricating a capacitor for an integrated circuit, comprising the steps of forming a titanium film for an adhesion layer over a substrate, forming a titanium dioxide film for a diffusion barrier layer by annealing the titanium film after ion-implantation of oxygen ion into a surface region of the titanium film so as to change titanium in the surface region to titanium dioxide, and forming a high dielectric constant capacitor on the titanium dioxide film.

Abstract translation: 一种用于制造用于集成电路的电容器的方法，包括以下步骤：在衬底上形成用于粘附层的钛膜，通过在离子注入氧离子之后将钛膜退火形成用于扩散阻挡层的二氧化钛膜 钛膜的表面区域，以将表面区域中的钛变为二氧化钛，并在二氧化钛膜上形成高介电常数电容器。

公开(公告)号：US5624864A

公开(公告)日：1997-04-29

申请号：US284984

申请日：1994-08-04

Applicant: Koji Arita ,  Eiji Fujii ,  Yasuhiro Shimada ,  Yasuhiro Uemoto ,  Toru Nasu ,  Akihiro Matsuda ,  Yoshihisa Nagano ,  Atsuo Inoue ,  Taketoshi Matsuura ,  Tatsuo Otsuki

Inventor： Koji Arita ,  Eiji Fujii ,  Yasuhiro Shimada ,  Yasuhiro Uemoto ,  Toru Nasu ,  Akihiro Matsuda ,  Yoshihisa Nagano ,  Atsuo Inoue ,  Taketoshi Matsuura ,  Tatsuo Otsuki

IPC: H01L21/02 ,  H01L21/8242 ,  H01L21/8246 ,  H01L27/115

CPC classification number: H01L27/11502 ,  H01L27/10852 ,  H01L27/11585 ,  H01L27/1159 ,  H01L28/40 ,  H01L28/55 ,  H01L28/60 ,  H01L28/75 ,  Y10S438/958

Abstract: A semiconductor device forming a capacitor through an interlayer insulating layer on a semiconductor substrate on which an integrated circuit is formed. This semiconductor device has an interlayer insulating layer with moisture content of 0.5 g/cm.sup.3 or less, which covers the capacitor in one aspect, and has a passivation layer with hydrogen content of 10.sup.21 atoms/cm.sup.3 or less, which covers the interconnections of the capacitor in other aspect. By thus constituting, deterioration of the capacitor dielectric can be prevented which brings about the electrical reliability of the ferroelectric layer or high dielectric layer.

Abstract translation: 一种通过半导体衬底上的层间绝缘层形成电容器的半导体器件，其上形成集成电路。 该半导体装置具有含水量为0.5g / cm 3以下的层间绝缘层，其在一个方面覆盖电容器，并且具有氢含量为1021原子/ cm3以下的钝化层，其覆盖电容器的互连 在其他方面。 通过这样构成，可以防止导致铁电层或高介电层的电可靠性的电容器电介质的劣化。

公开(公告)号：US08887893B2

公开(公告)日：2014-11-18

申请号：US13339426

申请日：2011-12-29

Applicant: Ryosuke Tsutsumi ,  Hiroaki Murakami ,  Yoshihisa Nagano

Inventor： Ryosuke Tsutsumi ,  Hiroaki Murakami ,  Yoshihisa Nagano

IPC: B23Q7/08 ,  B25J9/00 ,  B23P21/00

CPC classification number: B25J9/0093 ,  B23P21/004 ,  B25J9/0096 ,  Y10S901/16

Abstract: A work system according to embodiments includes a robot and work stations. The robot performs a predetermined work on a workpiece as a work target. The work stations are places where the predetermined work is performed on the workpiece. The robot performs conveying of the workpiece between the work stations.

Abstract translation: 根据实施例的工作系统包括机器人和工作站。 机器人作为工作目标在工件上执行预定的工作。 工作站是在工件上执行预定工作的地方。 机器人在工作站之间执行工件的传送。

公开(公告)号：US20120053724A1

公开(公告)日：2012-03-01

申请号：US13221013

申请日：2011-08-30

Applicant: Takeshi OKAMOTO ,  Kenji Matsufuji ,  Takurou Yano ,  Takuya Murayama ,  Yoshihisa Nagano

Inventor： Takeshi OKAMOTO ,  Kenji Matsufuji ,  Takurou Yano ,  Takuya Murayama ,  Yoshihisa Nagano

IPC: G05D3/12 ,  B25J19/04 ,  B25J13/08

CPC classification number: B25J9/1697 ,  B25J9/1682 ,  G05B2219/39109 ,  G05B2219/40053 ,  Y10S901/30

Abstract: A robot system includes a manipulator; a work table arranged within a movement extent of the manipulator; an imaging unit for taking a two-dimensional image of the workpieces loaded on the work table; a workpiece supply unit for supplying workpieces onto the work table; and a control system for controlling operations of the manipulator and the imaging unit. The control system includes an imaging control unit for controlling the imaging unit to take the two-dimensional image of the workpieces loaded on the work table, a workpiece detecting unit for detecting a position and a posture of each of the workpieces loaded on the work table by comparing the two-dimensional image taken by the imaging unit with templates stored in advance, and a manipulator control unit for operating the manipulator to perform a work with respect to the workpieces detected by the workpiece detecting unit.

Abstract translation: 机器人系统包括操纵器; 布置在机械手的移动范围内的工作台; 用于拍摄加载在工作台上的工件的二维图像的成像单元; 工件供给单元，用于将工件供给到工作台上; 以及用于控制操纵器和成像单元的操作的控制系统。 该控制系统包括：成像控制单元，用于控制成像单元，以取得装载在工作台上的工件的二维图像;工件检测单元，用于检测装载在工作台上的每个工件的位置和姿势 通过将成像单元拍摄的二维图像与预先存储的模板进行比较，以及操作器控制单元，用于操作操纵器以对由工件检测单元检测到的工件进行工作。

公开(公告)号：US07420237B2

公开(公告)日：2008-09-02

申请号：US11035175

申请日：2005-01-14

Applicant: Yoshihisa Nagano ,  Takumi Mikawa

Inventor： Yoshihisa Nagano ,  Takumi Mikawa

IPC: H01L31/062 ,  H01L31/113 ,  H01L27/108 ,  H01L29/76 ,  H01L29/94

CPC classification number: H01L28/65 ,  H01L27/10852 ,  H01L28/57 ,  H01L28/75

Abstract: A capacitor element is provided which is composed of a lower electrode, an upper electrode formed in opposing relation to the lower electrode, and a capacitor dielectric film made of a ferroelectric material or a high dielectric material and formed between the lower and upper electrodes. The lower electrode, the capacitor dielectric film, and the upper electrode are formed in a region extending at least from within a hole provided in an interlayer insulating film having a first hydrogen barrier film disposed on the upper surface thereof toward a position above the hole. A second hydrogen barrier film in contact with the first hydrogen barrier film is disposed to cover the upper surface of the upper electrode and the side surface of the portion of the upper electrode which has been formed above the hole.

Abstract translation: 提供一种电容器元件，其由下电极，与下电极相对形成的上电极和由电介质材料或高电介质材料制成并形成在下电极和上电极之间的电容器电介质膜组成。 下电极，电容器电介质膜和上电极形成在至少从设置在其上表面上的第一氢阻挡膜朝向孔上方的位置的层间绝缘膜的孔内延伸的区域中。 与第一氢阻挡膜接触的第二氢阻挡膜设置成覆盖上电极的上表面和形成在孔上方的上电极部分的侧表面。

公开(公告)号：US20070235787A1

公开(公告)日：2007-10-11

申请号：US11407048

申请日：2006-04-20

Applicant: Yoshihisa Nagano ,  Yuji Judai

Inventor： Yoshihisa Nagano ,  Yuji Judai

IPC: H01L27/108

CPC classification number: H01L28/55 ,  H01L27/11502 ,  H01L27/11507

Abstract: A capacitor device having a three-dimensional structure includes: a lower electrode formed on a semiconductor substrate to have a three-dimensional shape; a capacitor insulating film formed to cover the lower electrode and made of a ferroelectric material; and an upper electrode formed on the capacitor insulating film to have a step portion. A stress control layer is formed on the upper electrode to cause tensile stress and function as a moisture diffusion barrier.

Abstract translation: 具有三维结构的电容器器件包括：形成在半导体衬底上以形成三维形状的下电极; 形成为覆盖下电极并由铁电体材料制成的电容器绝缘膜; 以及形成在电容器绝缘膜上的上电极，以具有台阶部分。 在上部电极上形成应力控制层，产生拉伸应力，作为水分扩散阻挡层发挥作用。

公开(公告)号：US07132709B2

公开(公告)日：2006-11-07

申请号：US10149389

申请日：2001-11-02

Applicant: Yoshihisa Nagano ,  Toyoji Ito ,  Sadayuki Imanishi ,  Eiji Fujii

Inventor： Yoshihisa Nagano ,  Toyoji Ito ,  Sadayuki Imanishi ,  Eiji Fujii

IPC: H01L27/108 ,  H01L21/8242

CPC classification number: H01L27/11502 ,  H01L21/76832 ,  H01L21/76834 ,  H01L27/11507 ,  H01L28/55

Abstract: A capacitor 11 made up of a lower electrode 8, a capacitive insulating film 9 of an insulating metal oxide and an upper electrode 10 is formed over a semiconductor substrate 1. A first-layer wire 14 is formed on a passivation film 12 that covers the capacitor 11. A first interlevel dielectric film 15 is deposited to cover the first-layer wire 14. A second interlevel dielectric film 17 is deposited over the first interlevel dielectric film 15 with a barrier film 16, which overlaps the capacitor 11 for preventing hydrogen from diffusing, interposed therebetween. A second-layer wire 19 is formed on the second interlevel dielectric film 17. The first interlevel dielectric film 15 has a hydrogen content lower than that of the second interlevel dielectric film 17.

Abstract translation: 在半导体衬底1上形成由下电极8，绝缘金属氧化物的电容绝缘膜9和上电极10组成的电容器11.第一层布线14形成在钝化膜12上， 电容器11.沉积第一层间绝缘膜15以覆盖第一层布线14.第二层间电介质膜17在第一层间绝缘膜15上沉积有阻挡膜16，阻挡膜16与电容器11重叠以防止氢 扩散。 在第二层间电介质膜17上形成第二层布线19.第一层间绝缘膜15的氢含量低于第二层间电介质膜17的氢含量。

公开(公告)号：US20060065918A1

公开(公告)日：2006-03-30

申请号：US11270615

申请日：2005-11-10

Applicant: Yoshihisa Nagano ,  Yasuhiro Uemoto

Inventor： Yoshihisa Nagano ,  Yasuhiro Uemoto

IPC: H01L21/8244

CPC classification number: H01L27/10894 ,  H01L27/10852 ,  H01L27/11507 ,  H01L27/11509 ,  H01L28/55

Abstract: A protective insulating film is deposited over first and second field-effect transistors formed on a semiconductor substrate. A capacitor composed of a capacitor lower electrode, a capacitor insulating film composed of an insulating metal oxide film, and a capacitor upper electrode is formed on the protective insulating film. A first contact plug formed in the protective insulating film provides a direct connection between the capacitor lower electrode and an impurity diffusion layer of the first field-effect transistor. A second contact plug formed in the protective insulating film provides a direct connection between the capacitor upper electrode and an impurity diffusion layer of the second field-effect transistor.