知搜-全球专利检索

  1. Login
  2. Sign Up

Search Results

77 records (took 0.019 seconds)

    Vertically Stacked Image Sensor
    21.
    发明申请
    Vertically Stacked Image Sensor 审中-公开
    垂直堆叠图像传感器

    公开(公告)号：US20160343770A1

    公开(公告)日：2016-11-24

    申请号：US15225681

    申请日：2016-08-01

    Applicant: Apple Inc.

    Inventor： Xiaofeng Fan

    IPC: H01L27/148 ,  H01L27/146

    CPC classification number: H04N5/369 ,  H01L27/14614 ,  H01L27/14616 ,  H01L27/14634 ,  H01L27/14638 ,  H01L27/1464 ,  H01L27/14641 ,  H01L27/14643 ,  H01L27/14654 ,  H01L27/14843 ,  H01L29/7827 ,  H04N5/335 ,  H04N9/045

    Abstract: A vertically stacked image sensor having a photodiode chip and a transistor array chip. The photodiode chip includes at least one photodiode and a transfer gate extends vertically from a top surface of the photodiode chip. The image sensor further includes a transistor array chip stacked on top of the photodiode chip. The transistor array chip includes the control circuitry and storage nodes. The image sensor further includes a logic chip vertically stacked on the transistor array chip. The transfer gate communicates data from the at least one photodiode to the transistor array chip and the logic chip selectively activates the vertical transfer gate, the reset gate, the source follower gate, and the row select gate.

    Abstract translation: 具有光电二极管芯片和晶体管阵列芯片的垂直堆叠图像传感器。 光电二极管芯片包括至少一个光电二极管，并且传输门从光电二极管芯片的顶表面垂直延伸。 图像传感器还包括堆叠在光电二极管芯片顶部的晶体管阵列芯片。 晶体管阵列芯片包括控制电路和存储节点。 图像传感器还包括垂直堆叠在晶体管阵列芯片上的逻辑芯片。 传输门将数据从至少一个光电二极管传送到晶体管阵列芯片，逻辑芯片选择性地激活垂直传输门，复位栅极，源极跟随器栅极和行选择栅极。

    Image Sensor with Buried Light Shield and Vertical Gate
    22.
    发明申请
    Image Sensor with Buried Light Shield and Vertical Gate 有权
    图像传感器与埋地屏蔽和垂直门

    公开(公告)号：US20150035028A1

    公开(公告)日：2015-02-05

    申请号：US13959362

    申请日：2013-08-05

    Applicant: Apple Inc.

    Inventor： Xiaofeng Fan ,  Philip H. Li ,  Chung Chun Wan ,  Anup K. Sharma ,  Xiangli Li

    IPC: H01L27/146

    CPC classification number: H01L27/14623 ,  H01L27/1462 ,  H01L27/14625 ,  H01L27/14638 ,  H01L27/1464 ,  H01L27/14685

    Abstract: A pixel in an image sensor can include a photodetector and a storage region disposed in one substrate, or a photodetector disposed in one substrate and a storage region in another substrate. A buried light shield is disposed between the photodetector and the storage region. A sense region, such as a floating diffusion, can be adjacent to the storage region, with the buried light shield disposed between the photodetector and the storage and sense regions. When the photodetector and the storage region are disposed in separate substrates, a vertical gate can be formed through the buried light shield and used to initiate the transfer of charge from the photodetector and the storage region. A transfer channel formed adjacent to, or around the vertical gate provides a channel for the charge to transfer from the photodetector to the storage region.

    Abstract translation: 图像传感器中的像素可以包括设置在一个基板中的光电检测器和存储区域，或者设置在一个基板中的光电检测器和另一个基板中的存储区域。 掩埋的光屏蔽设置在光电检测器和存储区之间。 诸如浮动扩散的感测区域可以与存储区域相邻，其中掩埋的光屏蔽件设置在光电检测器和存储和感测区域之间。 当光电检测器和存储区域设置在分离的基板中时，可以通过掩埋的光屏蔽形成垂直栅极，并且用于开始从光电检测器和存储区域传输电荷。 形成在垂直栅极附近或周围的转移通道提供用于电荷从光电检测器转移到存储区域的通道。

    Creating arbitrary patterns on a 2-D uniform grid VCSEL array
    25.
    发明授权
    Creating arbitrary patterns on a 2-D uniform grid VCSEL array 有权

    公开(公告)号：US10700493B2

    公开(公告)日：2020-06-30

    申请号：US16524313

    申请日：2019-07-29

    Applicant: APPLE INC.

    Inventor： Chin Han Lin ,  Weiping Li ,  Xiaofeng Fan

    IPC: H01S5/183 ,  H01L29/15 ,  H01S5/187 ,  H01S5/42 ,  H01S5/042 ,  H01S5/20 ,  H01S5/026

    Abstract: An optoelectronic device includes a semiconductor substrate and an array of optoelectronic cells, formed on the semiconductor substrate. The cells include first epitaxial layers defining a lower distributed Bragg-reflector (DBR) stack; second epitaxial layers formed over the lower DBR stack, defining a quantum well structure; third epitaxial layers, formed over the quantum well structure, defining an upper DBR stack; and electrodes formed over the upper DBR stack, which are configurable to inject an excitation current into the quantum well structure of each optoelectronic cell. A first set of the optoelectronic cells are configured to emit laser radiation in response to the excitation current. In a second set of the optoelectronic cells, interleaved with the first set, at least one element of the optoelectronic cells, selected from among the epitaxial layers and the electrodes, is configured so that the optoelectronic cells in the second set do not emit the laser radiation.

    Image Sensor Having Full Well Capacity Beyond Photodiode Capacity
    26.
    发明申请
    Image Sensor Having Full Well Capacity Beyond Photodiode Capacity 审中-公开

    公开(公告)号：US20180278869A1

    公开(公告)日：2018-09-27

    申请号：US15992484

    申请日：2018-05-30

    Applicant: Apple Inc.

    Inventor： Xiaofeng Fan

    IPC: H04N5/369 ,  H01L27/146 ,  H04N9/04

    Abstract: A vertically stacked image sensor having a photodiode chip and a transistor array chip. The photodiode chip includes at least one photodiode and a transfer gate extends vertically from a top surface of the photodiode chip. The image sensor further includes a transistor array chip stacked on top of the photodiode chip. The transistor array chip includes the control circuitry and storage nodes. The image sensor further includes a logic chip vertically stacked on the transistor array chip. The transfer gate communicates data from the at least one photodiode to the transistor array chip and the logic chip selectively activates the vertical transfer gate, the reset gate, the source follower gate, and the row select gate.

Patent Agency Ranking