System for just-in-time retrieval of multimedia files over computer
networks by transmitting data packets at transmission rate determined
by frame size
    21.
    发明授权
    System for just-in-time retrieval of multimedia files over computer networks by transmitting data packets at transmission rate determined by frame size 失效
    通过以帧大小确定的传输速率传输数据包,通过计算机网络即时检索多媒体文件的系统

    公开(公告)号:US5822524A

    公开(公告)日:1998-10-13

    申请号:US505488

    申请日:1995-07-21

    摘要: A method in computer networks in which a client machine (playback client computer) requests multimedia files, such as compressed video clips, from a server (storage server computer). The transmission uses digital data packets. In the case of video files, the packet headers identify the video frame and the sequence number of each packet derived from the frame. The transmission timing is not based on a steady byte stream or an average of bytes to be transmitted. Instead, in the case of video, the frame rate determines normal transmission and a frame is transmitted during each frame time. The client agent has a normal packet buffer, normally holding 1-5 video frames. The transmission rate is adjusted to keep that buffer filled within its normal range. The timing information required for transmission, in one embodiment, is stored in a separate index file associated with each multimedia file.

    摘要翻译: 计算机网络中的方法,其中客户机(回放客户端计算机)从服务器(存储服务器计算机)请求诸如压缩视频剪辑的多媒体文件。 传输使用数字数据包。 在视频文件的情况下,分组标题标识从帧导出的每个分组的视频帧和序列号。 发送定时不是基于稳定的字节流或要发送的字节的平均值。 相反,在视频的情况下,帧速率确定正常传输,并且在每个帧时间期间发送帧。 客户端代理具有正常的分组缓冲区,通常保持1-5个视频帧。 调整传输速率以保持缓冲区在其正常范围内。 在一个实施例中,传输所需的定时信息被存储在与每个多媒体文件相关联的单独的索引文件中。

    CAPACITANCE-VARIABLE PRESSURE SENSOR
    23.
    发明申请

    公开(公告)号:US20200304123A1

    公开(公告)日:2020-09-24

    申请号:US16361220

    申请日:2019-03-22

    摘要: A capacitance-variable pressure sensor is disclosed. The capacitance-variable pressure sensor includes a double layer flexible circuit board, a multi-layer ceramic capacitor, and a soft conductive pad. The multi-layer ceramic capacitor is positioned in adjacent to the soft conductive pad. The double layer flexible circuit board is configured with a through hole or a notch, and is positioned between the multi-layer ceramic capacitor and the soft conductive pad. The multi-layer ceramic capacitor is positioned above the through hole or notch, and the soft conductive pad is positioned under the through hole or notch. The multi-layer ceramic capacitor includes a first member and a second member. The first member includes an external electrode or a plurality of external electrodes. The second member includes a ceramic dielectric, and a plurality of internal electrode layers disposed inside the ceramic dielectric. Each external electrode is connected to internal electrode layers.

    Gaming system that alters target images produced by an LED array

    公开(公告)号:US10675536B2

    公开(公告)日:2020-06-09

    申请号:US16151273

    申请日:2018-10-03

    申请人: Song Chen

    发明人: Song Chen

    摘要: A gaming system includes a light emitting diode (LED) array consisting of a plurality of LEDs. A controller individually controls each LED in the plurality of LEDs. A gaming app runs on a computing device that has a camera and display screen. The gaming app receives images from the camera. The image include an image of the LED array. The gaming app alters the image of the LED array to produce an altered image where one or more lit LEDs is replaced with a virtual object. The gaming app displays the altered image on the display screen.

    PIXEL ARRAY, ACTIVE DEVICE ARRAY SUBSTRATE AND FLAT DISPLAY PANEL
    27.
    发明申请
    PIXEL ARRAY, ACTIVE DEVICE ARRAY SUBSTRATE AND FLAT DISPLAY PANEL 有权
    像素阵列,有源设备阵列基板和平面显示面板

    公开(公告)号:US20130010247A1

    公开(公告)日:2013-01-10

    申请号:US13300674

    申请日:2011-11-21

    摘要: A pixel array including a pixel electrode and an active device is provided. The active device includes a gate, a channel layer, a source, a drain, a connection electrode, a first branch portion and a second branch portion. The gate is electrically connected with a scan line. The channel layer located at a side of the gate is electrically isolated from the gate. The source, the drain and the connection electrode are disposed on a part region of the channel layer. The first branch portion disposed on a part region of the channel layer is connected with an end of the connection electrode. The first branch portion surrounds the source located on the channel layer. The second branch portion disposed on a part region of the channel layer is connected with the other end of the connection electrode. The second branch portion surrounds the drain located on the channel layer.

    摘要翻译: 提供了包括像素电极和有源器件的像素阵列。 有源器件包括栅极,沟道层,源极,漏极,连接电极,第一分支部分和第二分支部分。 栅极与扫描线电连接。 位于栅极侧的沟道层与栅极电绝缘。 源极,漏极和连接电极设置在沟道层的一部分区域上。 设置在沟道层的一部分区域上的第一分支部分与连接电极的一端连接。 第一分支部分围绕位于通道层上的源。 设置在沟道层的一部分区域上的第二分支部分与连接电极的另一端连接。 第二分支部分围绕位于通道层上的漏极。

    Distributed micro instructions set processor architecture for high-efficiency signal processing
    29.
    发明授权
    Distributed micro instructions set processor architecture for high-efficiency signal processing 有权
    分布式微指令集处理器架构,用于高效率信号处理

    公开(公告)号:US08244270B2

    公开(公告)日:2012-08-14

    申请号:US13194547

    申请日:2011-07-29

    IPC分类号: H04Q7/20 H04W72/00

    摘要: A wireless communication system hosts a plurality of processes in accordance with a communication protocol. The system includes application specific instruction set processors (ASISPs) that provided computation support for the process. Each ASISP is capable of executing a subset of the functions of a communication protocol. A scheduler is used to schedule the ASISPs in a time-sliced algorithm so that each ASISP supports several processes. In this architecture, the ASISP actively performs computations for one of the supported processes (active process) at any given time. The state information of each process supported by a particular ASISP is stored in a memory bank that is uniquely associated with the ASISP. When a scheduler instructs an ASISP to change which process is the active process, the state information for the inactivated process is stored in the memory bank and the state information for the newly activated process is retrieved from the memory bank.

    摘要翻译: 无线通信系统根据通信协议承载多个进程。 该系统包括为该过程提供计算支持的特定于应用程序的指令集处理器(ASISP)。 每个ASISP能够执行通信协议的功能的子集。 调度程序用于以时间分片算法调度ASISP,以便每个ASISP支持多个进程。 在这种体系结构中,ASISP在任何给定的时间主动执行一个受支持进程(活动进程)的计算。 由特定ASISP支持的每个进程的状态信息存储在与ASISP唯一相关联的存储体中。 当调度器指示ASISP改变哪个进程是活动进程时,将非活动进程的状态信息存储在存储体中,并且从存储体检索新激活的进程的状态信息。

    Display panel with driving circuit and common electrode within sealant
    30.
    发明授权
    Display panel with driving circuit and common electrode within sealant 有权
    带驱动电路的显示面板和密封胶内的公共电极

    公开(公告)号:US08237904B2

    公开(公告)日:2012-08-07

    申请号:US13337160

    申请日:2011-12-26

    IPC分类号: G02F1/1345 G09G3/36 H01L29/04

    摘要: A driving circuit and a common electrode are located within a sealant region of the first substrate, wherein the driving circuit includes switch devices and turn-line structures. The common electrode is located within the sealant region of the first substrate. The planar layer is located on the first substrate, wherein the thickness of the planar layer at the turn-line structure of the driving circuit is less than the thicknesses of other portions. The conductive layer is located on the planar layer. A second substrate having an electrode thereon is disposed opposite to the first substrate. A liquid crystal layer is located within the display region between the first substrate and the second substrate. A sealant is located within the sealant region between the first substrate and the second substrate, and conductive balls are distributed in the sealant.

    摘要翻译: 驱动电路和公共电极位于第一基板的密封剂区域内,其中驱动电路包括开关装置和开关线结构。 公共电极位于第一基板的密封剂区域内。 平面层位于第一基板上,其中驱动电路的转线结构处的平面层的厚度小于其它部分的厚度。 导电层位于平面层上。 其上具有电极的第二基板设置成与第一基板相对。 液晶层位于第一基板和第二基板之间的显示区域内。 密封剂位于第一基板和第二基板之间的密封剂区域内,导电球分布在密封剂中。