公开(公告)号：US07515490B2

公开(公告)日：2009-04-07

申请号：US11309037

申请日：2006-06-12

Applicant: Jan-Ruei Lin ,  Shyh-Shyuan Sheu ,  Wei-Jen Chang

Inventor： Jan-Ruei Lin ,  Shyh-Shyuan Sheu ,  Wei-Jen Chang

IPC: G11C7/06 ,  G11C7/10 ,  G11C7/08 ,  G11C11/00

CPC classification number: G11C13/0014 ,  B82Y10/00 ,  G11C2213/79

Abstract: An organic memory at least includes a number of select lines, a number of data lines, a bit cell array, and a number of digital sensing circuits. The bit cell array includes a number of bit cells, wherein each bit cell includes an organic memory cell and a switch element. Each digital sensing circuit includes a current-to-voltage converter and a sensing block circuit. Therefore, a complete digital sensing mechanism of an organic memory IC is formed and is practicable and suitable for mass-production.

Abstract translation: 有机存储器至少包括多条选择线，多条数据线，位单元阵列和多个数字感测电路。 位单元阵列包括多个位单元，其中每个位单元包括有机存储单元和开关元件。 每个数字感测电路包括电流 - 电压转换器和感测块电路。 因此，形成有机存储器IC的完整的数字感测机构，并且是可行的并且适合于批量生产。

公开(公告)号：US20080310217A1

公开(公告)日：2008-12-18

申请号：US11948486

申请日：2007-11-30

Applicant: Pei-Chia Chiang ,  Shyh-Shyuan Sheu ,  Lieh-Chiu Lin

Inventor： Pei-Chia Chiang ,  Shyh-Shyuan Sheu ,  Lieh-Chiu Lin

IPC: G11C11/00 ,  G11C7/00

CPC classification number: G11C5/147 ,  G11C13/0004 ,  G11C13/0038 ,  G11C13/0069 ,  G11C2013/0078

Abstract: A writing circuit for a phase change memory is provided. The writing circuit comprises a driving current generating circuit, a first switch device, a first memory cell and a second switch device. The driving current generating circuit provides a writing current to the first memory cell. The first switch device is coupled to the driving current generating circuit. The first memory cell is coupled between the first switch device and the second switch device. The second switch device is coupled between the first memory cell and a ground, wherein when the driving current generating circuit outputs the writing current to the first memory cell, the second switch device is turned on after the first switch device has been turned on for a first predetermined time period.

Abstract translation: 提供了一种用于相变存储器的写入电路。 写入电路包括驱动电流产生电路，第一开关器件，第一存储器单元和第二开关器件。 驱动电流产生电路向第一存储单元提供写入电流。 第一开关器件耦合到驱动电流产生电路。 第一存储器单元耦合在第一开关器件和第二开关器件之间。 第二开关装置耦合在第一存储单元和地之间，其中当驱动电流产生电路向第一存储单元输出写入电流时，第二开关器件在第一开关器件接通之后导通， 第一预定时间段。

公开(公告)号：US20080239798A1

公开(公告)日：2008-10-02

申请号：US12000981

申请日：2007-12-19

Applicant: Shyh-Shyuan Sheu ,  Lieh-Chiu Lin ,  Pei-Chia Chiang

Inventor： Shyh-Shyuan Sheu ,  Lieh-Chiu Lin ,  Pei-Chia Chiang

IPC: G11C11/00 ,  G11C7/00

CPC classification number: G11C7/1078 ,  G11C7/1096 ,  G11C13/0004 ,  G11C13/0069 ,  G11C2013/0078

Abstract: One embodiment of the invention provides a compensation circuit. The compensation circuit comprises a writing driver, a distance detection circuit, an operating element and an auxiliary writing driver. The writing driver provides a writing current to a writing path. The distance detection circuit is coupled to the writing path to detect a distance that the writing current has travelled and outputs a control signal based on the distance. The operating element is coupled to the writing path. The auxiliary writing driver provides an auxiliary current to the writing path based on the control signal.

Abstract translation: 本发明的一个实施例提供一种补偿电路。 补偿电路包括写入驱动器，距离检测电路，操作元件和辅助写入驱动器。 写入驱动器向写入路径提供写入电流。 距离检测电路耦合到写入路径以检测写入电流已经行进的距离，并且基于该距离输出控制信号。 操作元件耦合到写入路径。 辅助写入驱动器基于控制信号向写入路径提供辅助电流。

公开(公告)号：US07242174B1

公开(公告)日：2007-07-10

申请号：US11309002

申请日：2006-06-07

Applicant: Shyh-Shyuan Sheu ,  Wei-Jen Chang ,  Jan-Ruei Lin

Inventor： Shyh-Shyuan Sheu ,  Wei-Jen Chang ,  Jan-Ruei Lin

IPC: G01R19/00 ,  G11C7/00

CPC classification number: G11C7/067 ,  B82Y10/00 ,  G11C11/5664 ,  G11C13/0014 ,  G11C27/02

Abstract: A digital sensing circuit capable of sensing bit information stored in a bit cell of an organic memory is provided. The digital sensing circuit includes a current-to-voltage converter, a reset block circuit, and a sensing block circuit. The current-to-voltage converter converts a conduction current into a voltage signal. The sensing block circuit buffers and outputs the bit information according to the voltage signal. Therefore, the challenge of design and layout of the present invention is very low so that the yield rate will be improved. Hence, a practical memory device suitable for mass-production is achieved.

Abstract translation: 提供一种能够感测存储在有机存储器的位单元中的位信息的数字感测电路。 数字感测电路包括电流 - 电压转换器，复位块电路和感测块电路。 电流 - 电压转换器将传导电流转换为电压信号。 感测块电路根据电压信号缓冲并输出位信息。 因此，本发明的设计和布局的挑战非常低，从而提高了成品率。 因此，实现了适合于批量生产的实用的记忆装置。

公开(公告)号：US20070152650A1

公开(公告)日：2007-07-05

申请号：US11309002

申请日：2006-06-07

Applicant: Shyh-Shyuan Sheu ,  Wei-Jen Chang ,  Jan-Ruei Lin

Inventor： Shyh-Shyuan Sheu ,  Wei-Jen Chang ,  Jan-Ruei Lin

IPC: G01R19/00

CPC classification number: G11C7/067 ,  B82Y10/00 ,  G11C11/5664 ,  G11C13/0014 ,  G11C27/02

Abstract: A digital sensing circuit capable of sensing bit information stored in a bit cell of an organic memory is provided. The digital sensing circuit comprises a current-to-voltage converter, a reset block circuit, and a sensing block circuit. The current-to-voltage converter converts a conduction current into a voltage signal. The sensing block circuit buffers and outputs the bit information according to the voltage signal. Therefore, the challenge of design and layout of the present invention is very low so that the yield rate will be improved. Hence, a practical memory device suitable for mass-production is achieved.

Abstract translation: 提供一种能够感测存储在有机存储器的位单元中的位信息的数字感测电路。 数字感测电路包括电流 - 电压转换器，复位块电路和感测块电路。 电流 - 电压转换器将传导电流转换为电压信号。 感测块电路根据电压信号缓冲并输出位信息。 因此，本发明的设计和布局的挑战非常低，从而提高了成品率。 因此，实现了适合于批量生产的实用的记忆装置。

公开(公告)号：US20070103962A1

公开(公告)日：2007-05-10

申请号：US11271550

申请日：2005-11-09

Applicant: Keng-Li Su ,  Shyh-Shyuan Sheu ,  Jan-Ruei Lin ,  Wei-Jen Chang ,  Chen-Pang Kung

Inventor： Keng-Li Su ,  Shyh-Shyuan Sheu ,  Jan-Ruei Lin ,  Wei-Jen Chang ,  Chen-Pang Kung

IPC: G11C11/00

CPC classification number: G11C13/00 ,  B82Y10/00 ,  G11C13/0014 ,  G11C2213/79

Abstract: A memory array including a plurality of programmable memory cells, a plurality of column lines and a plurality of row lines is introduced. Each of the programmable memory cells is coupled to corresponding one of the column lines and corresponding one of the row lines. Each of the programmable memory cells includes an organic memory cell and an active switching element. The active switching element is controlled by the column line and interposed between the row line and the organic memory cell. Under controlling of the column line, the active switching element is turned on to coupling the row line and the organic memory cell to connect to each other.

Abstract translation: 引入包括多个可编程存储器单元，多个列线和多个行线的存储器阵列。 每个可编程存储器单元耦合到对应的列线和对应的一行行。 每个可编程存储器单元包括有机存储单元和有源开关元件。 有源开关元件由列线控制并插入在行线和有机存储单元之间。 在列线的控制下，有源开关元件被接通以将行线和有机存储器单元耦合以彼此连接。

公开(公告)号：USRE45189E1

公开(公告)日：2014-10-14

申请号：US13571798

申请日：2012-08-10

Applicant: Shyh-Shyuan Sheu ,  Lieh-Chiu Lin ,  Pei-Chia Chiang ,  Wen-Pin Lin

Inventor： Shyh-Shyuan Sheu ,  Lieh-Chiu Lin ,  Pei-Chia Chiang ,  Wen-Pin Lin

IPC: G11C11/00

CPC classification number: G11C13/0069 ,  G11C13/0004 ,  G11C13/0064

Abstract: An embodiment of a writing system for a phase change memory based on a present application is disclosed. The writing system comprises a first phase change memory (PCM) cell, a second PCM cell, a first writing circuit and a verifying circuit. The first writing circuit executes a writing procedure, receives and writes a first data to the first PCM cell. The verifying circuit executes a verifying procedure and the circuit further comprises a processing unit and a second writing circuit. The processing unit reads and compares the data stored in the second PCM cell with a second data. The second writing circuit writes the second data to the second PCM cell when the data stored in the second PCM cell and the second data are not matched.

Abstract translation: 公开了一种基于本申请的相变存储器的写入系统的实施例。 该写入系统包括第一相变存储器（PCM）单元，第二PCM单元，第一写入电路和验证电路。 第一写入电路执行写入过程，将第一数据接收并写入第一PCM单元。 验证电路执行验证过程，并且电路还包括处理单元和第二写入电路。 处理单元读取并比较存储在第二PCM单元中的数据与第二数据。 当存储在第二PCM单元中的数据和第二数据不匹配时，第二写入电路将第二数据写入第二PCM单元。

公开(公告)号：US08507909B2

公开(公告)日：2013-08-13

申请号：US13308523

申请日：2011-11-30

Applicant: Ra-Min Tain ,  Ming-Ji Dai ,  Shyh-Shyuan Sheu ,  Chih-Sheng Lin ,  Shih-Hsien Wu

Inventor： Ra-Min Tain ,  Ming-Ji Dai ,  Shyh-Shyuan Sheu ,  Chih-Sheng Lin ,  Shih-Hsien Wu

IPC: H01L23/58

CPC classification number: G01B7/18 ,  G01L1/18 ,  G01L1/2206 ,  H01L2224/16145

Abstract: A measuring apparatus including a first chip, a first circuit layer, a first heater, a first stress sensor and a second circuit layer is provided. The first chip has a first through silicon via, a first surface and a second surface opposite to the first surface. The first circuit layer is disposed on the first surface. The first heater and the first stress sensor are disposed on the first surface and connected to the first circuit layer. The second circuit layer is disposed on the second surface. The first heater comprises a plurality of first switches connected in series to generate heat.

Abstract translation: 提供了包括第一芯片，第一电路层，第一加热器，第一应力传感器和第二电路层的测量装置。 第一芯片具有第一通孔硅通孔，第一表面和与第一表面相对的第二表面。 第一电路层设置在第一表面上。 第一加热器和第一应力传感器设置在第一表面上并连接到第一电路层。 第二电路层设置在第二表面上。 第一加热器包括串联连接以产生热量的多个第一开关。

公开(公告)号：US08031515B2

公开(公告)日：2011-10-04

申请号：US12275223

申请日：2008-11-21

Applicant: Shyh-Shyuan Sheu ,  Lieh-Chiu Lin ,  Pei-Chia Chiang ,  Wen-Pin Lin

Inventor： Shyh-Shyuan Sheu ,  Lieh-Chiu Lin ,  Pei-Chia Chiang ,  Wen-Pin Lin

IPC: G11C11/00

CPC classification number: G11C11/5678 ,  G11C13/0004 ,  G11C13/0069 ,  G11C2013/0078 ,  G11C2013/0092

Abstract: A data programming circuit for storing a writing data into a memory cell is provided. The data programming circuit includes a control circuit and a current generating circuit. The control circuit generates a control signal according to the writing data. The current generating circuit provides a writing current to the memory cell to change a crystalline state of the memory cell. The writing current has a pulse width corresponding to the writing data, and the crystalline state corresponds to the writing data.

Abstract translation: 提供了一种用于将写入数据存储到存储单元中的数据编程电路。 数据编程电路包括控制电路和电流产生电路。 控制电路根据写入数据生成控制信号。 电流产生电路向存储单元提供写入电流以改变存储单元的结晶状态。 写入电流具有对应于写入数据的脉冲宽度，并且结晶状态对应于写入数据。

公开(公告)号：US20090135645A1

公开(公告)日：2009-05-28

申请号：US12275223

申请日：2008-11-21

Applicant: Shyh-Shyuan Sheu ,  Lieh-Chiu Lin ,  Pei-Chia Chiang ,  Wen-Pin Lin

Inventor： Shyh-Shyuan Sheu ,  Lieh-Chiu Lin ,  Pei-Chia Chiang ,  Wen-Pin Lin

IPC: G11C7/00 ,  G11C11/56

CPC classification number: G11C11/5678 ,  G11C13/0004 ,  G11C13/0069 ,  G11C2013/0078 ,  G11C2013/0092

Abstract: A data programming circuit for storing a writing data into a memory cell is provided. The data programming circuit includes a control circuit and a current generating circuit. The control circuit generates a control signal according to the writing data. The current generating circuit provides a writing current to the memory cell to change a crystalline state of the memory cell. The writing current has a pulse width corresponding to the writing data, and the crystalline state corresponds to the writing data.

Abstract translation: 提供了一种用于将写入数据存储到存储单元中的数据编程电路。 数据编程电路包括控制电路和电流产生电路。 控制电路根据写入数据生成控制信号。 电流产生电路向存储单元提供写入电流以改变存储单元的结晶状态。 写入电流具有对应于写入数据的脉冲宽度，并且结晶状态对应于写入数据。