公开(公告)号：US06534350B2

公开(公告)日：2003-03-18

申请号：US09920877

申请日：2001-08-02

Applicant: Chih-Chiang Chen ,  Kun-Chih Lin ,  Chung-Shu Chang ,  Wen-Yu Huang ,  Pi-Fu Chen

Inventor： Chih-Chiang Chen ,  Kun-Chih Lin ,  Chung-Shu Chang ,  Wen-Yu Huang ,  Pi-Fu Chen

IPC: H01L2100

CPC classification number: H01L29/66757 ,  H01L29/4908 ,  H01L29/78609 ,  H01L29/78621 ,  H01L29/78675

Abstract: A method for fabricating a low temperature polysilicon thin film transistor incorporating a channel passivation step is described. The method achieves dopant ion activation in a polysilicon gate by using laser irradiation, however, with an additional insulating material layer such as SiOx or SixNy overlying and protecting the channel portion of the polysilicon gate. Any possible contamination by residual photoresist material after a photoresist removal step on the channel portion of the polysilicon gate can thus be avoided. Furthermore, deficiencies such as dopant ions out-diffusion and lateral diffusion can be avoided. The leakage current of the thin film transistors formed by the present invention method is significantly reduced when compared to those formed by a conventional method.

Abstract translation: 描述了一种制造并入通道钝化步骤的低温多晶硅薄膜晶体管的制造方法。 该方法通过使用激光照射在多晶硅栅极中实现掺杂剂离子活化，然而，通过覆盖并保护多晶硅栅极的沟道部分的诸如SiOx或SixNy的附加绝缘材料层来实现掺杂剂离子激活。 因此，可以避免在多晶硅栅极的沟道部分上的光致抗蚀剂去除步骤之后残留的光致抗蚀剂材料的任何可能的污染。 此外，可以避免诸如掺杂剂离子扩散和横向扩散的缺陷。 与通过常规方法形成的薄膜晶体管相比，通过本发明方法形成的薄膜晶体管的漏电流显着降低。

公开(公告)号：US06482685B1

公开(公告)日：2002-11-19

申请号：US10037014

申请日：2001-12-31

Applicant: Chih-Chiang Chen ,  Kun-Chih Lin

Inventor： Chih-Chiang Chen ,  Kun-Chih Lin

IPC: H01L29786

CPC classification number: H01L29/66757 ,  H01L29/78621 ,  H01L29/78675

Abstract: A method for fabricating a low temperature polysilicon thin film transistor incorporating a multi-layer channel passivation stack, and for activating dopant ions in a polysilicon gate in the TFT structure has been described. In the method, a multi-layer channel passivation stack consisting of a first insulating material layer, a metal layer and a second insulating material layer are first deposited on a polysilicon gate to shield a channel region in the gate during a laser irradiation process for activating the dopant ions in the gate. Any damages to the channel region of the polysilicon gate by the laser irradiation or the rapid thermal annealing step can be avoided, as well as the dopant impurity out-diffusion and lateral diffusion problems.

Abstract translation: 已经描述了一种制造包含多层沟道钝化层的低温多晶硅薄膜晶体管，并且用于激活TFT结构中的多晶硅栅极中的掺杂剂离子的方法。 在该方法中，首先在多晶硅栅极上沉积由第一绝缘材料层，金属层和第二绝缘材料层组成的多层沟道钝化层，以在用于激活的激光照射过程中屏蔽栅极中的沟道区 栅极中的掺杂剂离子。 可以避免通过激光照射或快速热退火步骤对多晶硅栅极的沟道区域的任何损坏，以及掺杂剂杂质扩散和横向扩散问题。

公开(公告)号：US09577137B2

公开(公告)日：2017-02-21

申请号：US12202647

申请日：2008-09-02

Applicant: An-Thung Cho ,  Chih-Wei Chao ,  Chia-Tien Peng ,  Kun-Chih Lin

Inventor： An-Thung Cho ,  Chih-Wei Chao ,  Chia-Tien Peng ,  Kun-Chih Lin

IPC: H01L31/04 ,  H01L31/0352 ,  H01L21/28 ,  H01L27/12 ,  H01L31/06 ,  H01L31/10 ,  H01L31/18

CPC classification number: H01L31/1804 ,  G01J1/0247 ,  G01J1/4204 ,  H01L21/28273 ,  H01L27/12 ,  H01L27/1214 ,  H01L31/0352 ,  H01L31/06 ,  H01L31/10 ,  Y02E10/547 ,  Y02P70/521

Abstract: One aspect of the present invention relates to a photovoltaic cell. In one embodiment, the photovoltaic cell includes a first conductive layer, an N-doped semiconductor layer formed on the first conductive layer, a first silicon layer formed on the N-doped semiconductor layer, a nanocrystalline silicon (nc-Si) layer formed on a first silicon layer, a second silicon layer formed on the nc-Si layer, a P-doped semiconductor layer on the second silicon layer, and a second conductive layer formed on the P-doped semiconductor layer, where one of the first silicon layer and the second silicon layer is formed of amorphous silicon, and the other of the first silicon layer and the second silicon layer formed of polycrystalline silicon.

Abstract translation: 本发明的一个方面涉及一种光伏电池。 在一个实施例中，光伏电池包括第一导电层，形成在第一导电层上的N掺杂半导体层，形成在N掺杂半导体层上的第一硅层，形成在N掺杂半导体层上的纳米晶硅（nc-Si）层 第一硅层，形成在nc-Si层上的第二硅层，在第二硅层上的P掺杂半导体层，以及形成在P掺杂半导体层上的第二导电层，其中第一硅层 并且所述第二硅层由非晶硅形成，并且所述第一硅层和所述第二硅层中的另一个由多晶硅形成。

公开(公告)号：US08692250B2

公开(公告)日：2014-04-08

申请号：US12269041

申请日：2008-11-12

Applicant: Ming-Hsien Lee ,  Ching-Chieh Shih ,  An-Thung Cho ,  Chia-Tien Peng ,  Kun-Chih Lin

Inventor： Ming-Hsien Lee ,  Ching-Chieh Shih ,  An-Thung Cho ,  Chia-Tien Peng ,  Kun-Chih Lin

IPC: H01L29/04

CPC classification number: H01L27/14687 ,  G02F2001/13312 ,  G02F2201/58 ,  G06F3/0412 ,  G06F3/042 ,  H01L27/1214 ,  H01L27/14632

Abstract: A method for fabricating a TFT array substrate including the following steps is provided. A substrate having a pixel region and a photosensitive region is provided. A first patterned conductive layer is formed on the substrate, wherein the first patterned conductive layer includes a gate electrode disposed in the pixel region and a first electrode disposed in the photosensitive region, and a photosensitive dielectric layer is formed on the first electrode. A gate insulation layer is formed to cover the gate electrode, the photosensitive dielectric layer and the first electrode. A patterned semiconductor layer is formed on the gate insulation layer above the gate electrode. A source electrode and a drain electrode are formed on the patterned semiconductor layer at two sides of the gate electrode, wherein the gate electrode, the source electrode, and the drain electrode constitute a TFT. A second electrode is formed on the photosensitive dielectric layer.

Abstract translation: 提供了一种制造包括以下步骤的TFT阵列基板的方法。 提供具有像素区域和感光区域的基板。 第一图案化导电层形成在基板上，其中第一图案化导电层包括设置在像素区域中的栅极电极和设置在感光区域中的第一电极，并且在第一电极上形成光敏介电层。 形成栅极绝缘层以覆盖栅电极，光敏介电层和第一电极。 在栅极电极上方的栅极绝缘层上形成有图案化的半导体层。 源电极和漏电极形成在栅电极两侧的图案化半导体层上，其中栅电极，源电极和漏电极构成TFT。 在感光介电层上形成第二电极。

公开(公告)号：US08415182B2

公开(公告)日：2013-04-09

申请号：US12645448

申请日：2009-12-22

Applicant: An-Thung Cho ,  Chia-Tien Peng ,  Yuan-Jun Hsu ,  Ching-Chieh Shih ,  Chien-Sen Weng ,  Kun-Chih Lin ,  Hang-Wei Tseug ,  Ming-Huang Chuang

Inventor： An-Thung Cho ,  Chia-Tien Peng ,  Yuan-Jun Hsu ,  Ching-Chieh Shih ,  Chien-Sen Weng ,  Kun-Chih Lin ,  Hang-Wei Tseug ,  Ming-Huang Chuang

IPC: H01L33/00

CPC classification number: H01L27/1214 ,  G02F1/13318 ,  G02F1/136213 ,  G02F2201/58 ,  G09G3/3406 ,  G09G3/3611 ,  G09G2320/0626 ,  G09G2320/066 ,  G09G2330/021 ,  G09G2360/144 ,  H01L27/127 ,  H01L31/103 ,  H01L31/105 ,  H04N5/58 ,  H04N5/66 ,  H04N21/42202

Abstract: A manufacturing method of a thin film transistor array substrate is provided. In the method, a substrate having a display region and a sensing region is provided. At least a display thin film transistor is formed in the display region, a first sensing electrode is formed in the sensing region, and an inter-layer dielectric layer is disposed on the substrate, covers the display thin film transistor, and exposes the first sensing electrode. A patterned photo sensitive dielectric layer is then formed on the first sensing electrode. A patterned transparent conductive layer is subsequently formed on the substrate, wherein the patterned transparent conductive layer includes a pixel electrode coupled to the corresponding display thin film transistor and includes a second sensing electrode located on the patterned photo sensitive dielectric layer. A manufacturing method of a liquid crystal display panel adopting the aforementioned thin film transistor array substrate is also provided.

Abstract translation: 提供薄膜晶体管阵列基板的制造方法。 在该方法中，提供具有显示区域和检测区域的基板。 在显示区域中形成至少一个显示薄膜晶体管，在感测区域中形成第一感测电极，并且在衬底上设置层间电介质层，覆盖显示薄膜晶体管，并暴露第一感测 电极。 然后在第一感测电极上形成图案化的光敏介电层。 随后在衬底上形成图案化的透明导电层，其中图案化的透明导电层包括耦合到对应的显示薄膜晶体管的像素电极，并且包括位于图案化的光敏介电层上的第二感测电极。 还提供了采用上述薄膜晶体管阵列基板的液晶显示面板的制造方法。

公开(公告)号：US08264244B2

公开(公告)日：2012-09-11

申请号：US12703732

申请日：2010-02-10

Applicant: Kun-Chih Lin ,  Wen-Chi Wu

Inventor： Kun-Chih Lin ,  Wen-Chi Wu

IPC: G01R27/26

CPC classification number: H03K17/962 ,  G01D5/24 ,  H03K2217/96074 ,  H03K2217/960745

Abstract: A capacitance difference detecting circuit includes a control circuit, for generating a control signal according to a first voltage and a second voltage; a first capacitor to be detected; a second capacitor to be detected; a first constant capacitor, having a terminal coupled to the first terminal of the first capacitor to be detected and the first input terminal; a second constant capacitor, having a terminal coupled to the first terminal of the second capacitor to be detected and the second input terminal; a voltage control unit, cooperating with the first capacitor to be detected, the second capacitor to be detected, the first constant capacitor and the second constant capacitor to control the first voltage and the second voltage. The voltage control unit is an adjustable capacitor and a capacitance value of the adjustable capacitor is controlled by the control signal.

Abstract translation: 电容差检测电路包括用于根据第一电压和第二电压产生控制信号的控制电路; 要检测的第一电容器; 要检测的第二电容器; 第一恒定电容器，具有耦合到待检测的第一电容器的第一端子和第一输入端子的端子; 第二恒定电容器，具有耦合到待检测的第二电容器的第一端子的端子和第二输入端子; 与待检测的第一电容器，待检测的第二电容器，第一恒定电容器和第二恒定电容器配合的电压控制单元，以控制第一电压和第二电压。 电压控制单元是可调电容器，可调电容器的电容值由控制信号控制。

公开(公告)号：US08178882B2

公开(公告)日：2012-05-15

申请号：US12557131

申请日：2009-09-10

Applicant: Long-Sheng Liao ,  Kun-Chih Lin ,  Chia-Tien Peng

Inventor： Long-Sheng Liao ,  Kun-Chih Lin ,  Chia-Tien Peng

IPC: H01L29/786

CPC classification number: H01L21/02686 ,  H01L21/02532 ,  H01L21/2026 ,  H01L21/2205 ,  H01L21/268 ,  H01L29/66757 ,  H01L29/78603 ,  H01L29/78675

Abstract: A buffer layer for promoting electron mobility. The buffer layer comprises amorphous silicon layer (a-Si) and an oxide-containing layer. The a-Si has high enough density that the particles in the substrate are prevented by the a-Si buffer layer from diffusing into the active layer. As well, the buffer, having thermal conductivity, provides a good path for thermal diffusion during the amorphous active layer's recrystallization by excimer laser annealing (ELA). Thus, the uniformity of the grain size of the crystallized silicon is improved, and electron mobility of the TFT is enhanced.

Abstract translation: 用于促进电子迁移率的缓冲层。 缓冲层包括非晶硅层（a-Si）和含氧化物层。 a-Si具有足够高的密度，通过a-Si缓冲层防止衬底中的颗粒扩散到有源层中。 同样，具有导热性的缓冲器为通过受激准分子激光退火（ELA）的无定形有源层重结晶期间的热扩散提供了良好的途径。 因此，结晶硅的晶粒尺寸的均匀性提高，TFT的电子迁移率提高。

公开(公告)号：US20120103413A1

公开(公告)日：2012-05-03

申请号：US13347969

申请日：2012-01-11

Applicant: Chin-Yao Tsai ,  Chih-Wei Chang ,  Ching-In Wu ,  Kai-Hsiang Chuang ,  Chih-Hsiung Chang ,  Kun-Chih Lin

Inventor： Chin-Yao Tsai ,  Chih-Wei Chang ,  Ching-In Wu ,  Kai-Hsiang Chuang ,  Chih-Hsiung Chang ,  Kun-Chih Lin

IPC: H01L31/02 ,  H01L31/18

CPC classification number: H01L31/03767 ,  C07C211/04 ,  C07C211/05 ,  H01L31/048 ,  H01L31/1864 ,  Y02E10/50 ,  Y02P70/521

Abstract: A thin-film solar cell includes a body and a polymer layer. The body includes a first electrode layer, a photoelectric conversion layer, and a second electrode layer, and the polymer layer includes a hardening material and an interface material. The photoelectric conversion layer is disposed between the first electrode layer and the second electrode layer, and the polymer layer surrounds the photoelectric conversion layer, in which the interface material is used for bonding to the hardening material and the photoelectric conversion layer respectively. Therefore, the thin-film solar cell may reduce the Staebler-Wronski Effect generated by the photoelectric conversion layer in the photoelectric conversion procedure. Accordingly, the photoelectric conversion efficiency is improved.

Abstract translation: 薄膜太阳能电池包括主体和聚合物层。 主体包括第一电极层，光电转换层和第二电极层，聚合物层包括硬化材料和界面材料。 光电转换层设置在第一电极层和第二电极层之间，聚合物层围绕光电转换层，其中界面材料分别用于与硬化材料和光电转换层接合。 因此，薄膜太阳能电池可以减少由光电转换层产生的Staebler-Wronski效应。 因此，提高了光电转换效率。

公开(公告)号：US20120090676A1

公开(公告)日：2012-04-19

申请号：US13331100

申请日：2011-12-20

Applicant: Chih-Hsiung Lin ,  Yu-Tsang Chien ,  Chih-Hsiung Chang ,  Kun-Chih Lin ,  Yueh-Hsun Lee

Inventor： Chih-Hsiung Lin ,  Yu-Tsang Chien ,  Chih-Hsiung Chang ,  Kun-Chih Lin ,  Yueh-Hsun Lee

IPC: H01L31/0352 ,  H01L31/18

CPC classification number: H01L31/022466 ,  H01L31/075 ,  H01L31/1884 ,  Y02E10/548

Abstract: A thin-film solar cell and a method for manufacturing the same are presented, in which the dopant concentration turns low in a sloping way. The solar cell includes a substrate, a first contact region, a photoelectric conversion layer, and a second contact region. The first contact region a photoelectric conversion layer, and a second contact region are disposed on the substrate. At least one of the first contact region and the second contact region contains an N-type dopant, and the concentration of the N-type dopant is decreased gradually in a direction towards the photoelectric conversion layer. Through the thin-film solar cell and the method for manufacturing the same, the conversion efficiency of the solar cell is improved, and the thin-film solar cell and the manufacturing method are capable of being integrated with an existing manufacturing process of a solar cell, thereby simplifying the manufacturing process and reducing the cost.

Abstract translation: 提出了一种薄膜太阳能电池及其制造方法，其中掺杂剂浓度以倾斜方式变低。 太阳能电池包括基板，第一接触区域，光电转换层和第二接触区域。 第一接触区域是光电转换层，第二接触区域设置在基板上。 第一接触区域和第二接触区域中的至少一个包含N型掺杂剂，并且N型掺杂剂的浓度在朝向光电转换层的方向上逐渐减小。 通过薄膜太阳能电池及其制造方法，提高了太阳能电池的转换效率，并且薄膜太阳能电池和制造方法能够与现有的太阳能电池的制造工艺相结合 ，从而简化制造过程并降低成本。

公开(公告)号：US08088990B1

公开(公告)日：2012-01-03

申请号：US13118110

申请日：2011-05-27

Applicant: Chin-Yao Tsai ,  Yi-Kai Lin ,  I-Heng Tseng ,  Chih-Hsiung Chang ,  Kun-Chih Lin

Inventor： Chin-Yao Tsai ,  Yi-Kai Lin ,  I-Heng Tseng ,  Chih-Hsiung Chang ,  Kun-Chih Lin

IPC: H01L31/042

CPC classification number: H01L31/02167 ,  H01L31/03921 ,  H01L31/046 ,  H01L31/0463 ,  H01L31/0465 ,  H01L31/0468 ,  Y02A30/62 ,  Y02B10/12 ,  Y02E10/50

Abstract: In one aspect of the present invention, a photovoltaic panel includes a substrate, a reflective layer formed on the substrate, a first conductive layer formed on the reflective layer, an active layer formed on the first conductive layer, and a second conductive layer formed on the active layer. The reflective layer has an index of refraction and a thickness such that the reflectance spectrum of the photovoltaic device for light incident on the substrate has a maximum in a selected wavelength range in the visible spectrum.

Abstract translation: 在本发明的一个方面中，光伏面板包括基板，形成在基板上的反射层，形成在反射层上的第一导电层，形成在第一导电层上的有源层，以及形成在第一导电层上的第二导电层 活动层。 反射层具有折射率和厚度，使得入射到基板上的光的光电器件的反射光谱在可见光谱中在选定的波长范围内具有最大值。