Abstract:
A capacitance difference detecting method, comprising: (a) utilizing a voltage control unit to cooperate with a first capacitor to be detected and a second capacitor to be detected to generate a first voltage and a second voltage; and (b) computing a capacitance difference between the first capacitor to be detected and the second capacitor to be detected according to the first voltage, the second voltage and a parameter of the voltage control unit.
Abstract:
A capacitance difference detecting circuit with a control circuit, a first capacitor, a second capacitor, a voltage control unit and a computing device. The control circuit generates a control signal according to a first voltage and a second voltage. The voltage control unit cooperates with the first capacitor to be detected and the second capacitor to be detected, according to the control signal, to generate the first voltage and the second voltage. The computing device computes a capacitance difference between the first capacitor to be detected and the second capacitor to be detected according to the first voltage, the second voltage and a parameter of the voltage control unit.
Abstract:
A capacitance difference detecting circuit, which comprises: a control circuit, for generating a control signal according to a first voltage and a second voltage; a first capacitor to be detected; a second capacitor to be detected; a voltage control unit, for cooperating with the first capacitor to be detected and the second capacitor to be detected, according to the control signal, to generate the first voltage and the second voltage; and a computing device, for computing a capacitance difference between the first capacitor to be detected and the second capacitor to be detected according to the first voltage, the second voltage and a parameter of the voltage control unit.
Abstract:
A capacitance difference detecting circuit, which comprises: a control circuit, for generating a control signal according to a first voltage and a second voltage; a first capacitor to be detected; a second capacitor to be detected; a first constant capacitor, having a terminal coupled to the first terminal of the first capacitor to be detected and the first input terminal; a second constant capacitor, having a terminal coupled to the first terminal of the second capacitor to be detected and the second input terminal; a voltage control unit, cooperating with the first capacitor to be detected, the second capacitor to be detected, the first constant capacitor and the second constant capacitor to control the first voltage and the second voltage. The voltage control unit is an adjustable capacitor and a capacitance value of the adjustable capacitor is controlled by the control signal.
Abstract:
A capacitance difference detecting circuit includes a control circuit, for generating a control signal according to a first voltage and a second voltage; a first capacitor to be detected; a second capacitor to be detected; a first constant capacitor, having a terminal coupled to the first terminal of the first capacitor to be detected and the first input terminal; a second constant capacitor, having a terminal coupled to the first terminal of the second capacitor to be detected and the second input terminal; a voltage control unit, cooperating with the first capacitor to be detected, the second capacitor to be detected, the first constant capacitor and the second constant capacitor to control the first voltage and the second voltage. The voltage control unit is an adjustable capacitor and a capacitance value of the adjustable capacitor is controlled by the control signal.
Abstract:
A method for fabricating a TFT array substrate including the following steps is provided. A substrate having a pixel region and a photosensitive region is provided. A first patterned conductive layer is formed on the substrate, wherein the first patterned conductive layer includes a gate electrode disposed in the pixel region and a first electrode disposed in the photosensitive region, and a photosensitive dielectric layer is formed on the first electrode. A gate insulation layer is formed to cover the gate electrode, the photosensitive dielectric layer and the first electrode. A patterned semiconductor layer is formed on the gate insulation layer above the gate electrode. A source electrode and a drain electrode are formed on the patterned semiconductor layer at two sides of the gate electrode, wherein the gate electrode, the source electrode, and the drain electrode constitute a TFT. A second electrode is formed on the photosensitive dielectric layer.
Abstract:
An optical sensor includes a silicon-rich dielectric photosensitive device and a read-out device. The silicon-rich dielectric photosensitive device includes a first electrode, a second electrode, and a photosensitive silicon-rich dielectric layer disposed therebetween. The photosensitive silicon-rich dielectric layer includes a plurality of nanocrystalline silicon crystals therein. The read-out device is electrically connected to the first electrode of the silicon-rich dielectric photosensitive device for reading out opto-electronic signals transmitted from the photo-sensitive silicon-rich dielectric layer.
Abstract:
A buffer layer for promoting electron mobility. The buffer layer comprises amorphous silicon layer (a-Si) and an oxide-containing layer. The a-Si has high enough density that the particles in the substrate are prevented by the a-Si buffer layer from diffusing into the active layer. As well, the buffer, having thermal conductivity, provides a good path for thermal diffusion during the amorphous active layer's recrystallization by excimer laser annealing (ELA). Thus, the uniformity of the grain size of the crystallized silicon is improved, and electron mobility of the TFT is enhanced.
Abstract:
A buffer layer for promoting electron mobility. The buffer layer comprises amorphous silicon layer (a-Si) and an oxide-containing layer. The a-Si has high enough density that the particles in the substrate are prevented by the a-Si buffer layer from diffusing into the active layer. As well, the buffer, having thermal conductivity, provides a good path for thermal diffusion during the amorphous active layer's recrystallization by excimer laser annealing (ELA). Thus, the uniformity of the grain size of the crystallized silicon is improved, and electron mobility of the TFT is enhanced.
Abstract:
In one aspect of the present invention, a photovoltaic panel includes a substrate, a reflective layer formed on the substrate, a first conductive layer formed on the reflective layer, an active layer formed on the first conductive layer, and a second conductive layer formed on the active layer. The reflective layer has an index of refraction and a thickness such that the reflectance spectrum of the photovoltaic device for light incident on the substrate has a maximum in a selected wavelength range in the visible spectrum.