公开(公告)号：US07675467B2

公开(公告)日：2010-03-09

申请号：US12072789

申请日：2008-02-27

申请人： Jong Ho Park ,  Sung Mo Hwang ,  Soon Bea Oh ,  Young Soon Lee ,  Ui Jung Kim

发明人： Jong Ho Park ,  Sung Mo Hwang ,  Soon Bea Oh ,  Young Soon Lee ,  Ui Jung Kim

IPC分类号： H01Q1/38 ,  H01Q1/36

CPC分类号： H01Q1/362 ,  H01Q1/38 ,  H01Q9/42

摘要： Provided is a bent monopole antenna. The bent monopole antenna includes a printed circuit board, an RF module, a feed line, and a main radiation pattern part and a sub-radiation pattern part. The RF module is installed the printed circuit board to generate an electrical signal. The feed line is connected to the RF module to deliver the electrical signal. The main radiation pattern part and the sub-radiation pattern part serve as a radiation pattern part connected to the feed line to generate an electromagnetic field (electromagnetic waves) using electrical signals applied thereto. The main radiation pattern part has a spiral (helical) pattern passing through the printed circuit board through a via.

摘要翻译： 提供了一种弯曲的单极天线。 弯曲单极天线包括印刷电路板，RF模块，馈线，以及主辐射图案部分和子辐射图案部分。 RF模块安装印刷电路板以产生电信号。 馈线连接到RF模块以传送电信号。 主辐射图部分和副辐射图部分用作连接到馈线的辐射图形部分，以使用施加到其上的电信号产生电磁场（电磁波）。 主辐射图形部分具有通过通孔穿过印刷电路板的螺旋（螺旋）图案。

公开(公告)号：US20100048971A1

公开(公告)日：2010-02-25

申请号：US12593249

申请日：2008-03-28

申请人： Jong-Nam Kim ,  Jong-Ho Park ,  Seong-Jun Lee ,  Min-Su Ko ,  Hee Tae Beum ,  Jongkee Park ,  Chang Hyun Ko ,  Sang Sup Han ,  Soon-Haeng Cho

发明人： Jong-Nam Kim ,  Jong-Ho Park ,  Seong-Jun Lee ,  Min-Su Ko ,  Hee Tae Beum ,  Jongkee Park ,  Chang Hyun Ko ,  Sang Sup Han ,  Soon-Haeng Cho

IPC分类号： C07C7/04 ,  C07C7/11

CPC分类号： B01D53/047 ,  B01D2256/24 ,  B01D2257/7022 ,  B01D2259/40054 ,  B01D2259/4006 ,  B01D2259/40062 ,  B01D2259/40067 ,  B01D2259/403 ,  C07C7/13 ,  C07C11/08

摘要： The present invention relates to a method and an apparatus for the separation of C4 olefins (butene-1, trans-2-butene, cis-2-butene, etc.) and C4 paraffins (normal butane, isobutane, etc.) from a C4 hydrocarbon mixed gas including butene-1, trans-2-butene, cis-2-butene, normal butane, isobutane, etc. The method of the present invention produces C4 olefins with high purity by introducing a gaseous C4 mixture into the adsorption tower loaded with adsorbent selectively adsorbing olefins to adsorb C4 olefins and to discharge C4 paraffins to the outlet of the tower, desorbing C4 olefins adsorbed on the adsorption tower with a desorbent (C5 hydrocarbon, C6 hydrocarbon, etc.), and then separating the C4 olefin and the desorbent by a distillation process. The apparatus of the present invention is composed of several adsorption towers loaded with an adsorbent which selectively adsorb olefins and two distillation towers for the separation of the mixture gases of olefins/desorbents and paraffins/desorbents respectively, The basic operating process of the adsorption tower comprises a adsorption step of selectively adsorbing C4 olefin from the feeding mixture, a C4 olefin rinse step of removing a small amount of C4 paraffins adsorbed together with C4 olefins, and a desorption step of desorbing C4 olefins by using a desorbent, and further comprises a pressure equalization step, a cocurrent depressurization step, and a accumulation pressure step in order to increase the yield and concentration of olefins depending on the operation pressure of the adsorption tower. The desorbent discharged from the process together with olefins or paraffins is separated in the distillation tower and then recycled.

摘要翻译： 本发明涉及一种用于分离C4烯烃（丁烯-1，反式-2-丁烯，顺-2-丁烯等）和C4链烷烃（正丁烷，异丁烷等）的方法和装置， 包括丁烯-1，反式-2-丁烯，顺式-2-丁烯，正丁烷，异丁烷等的C4烃混合气体。本发明的方法通过将气态C 4混合物引入吸附塔中来生产高纯度的C4烯烃 负载吸附剂选择性吸附烯烃以吸附C4烯烃并将C4链烷烃排出到塔的出口，用解吸剂（C5烃，C6烃等）解吸吸附在吸附塔上的C4烯烃，然后分离C4烯烃 和通过蒸馏方法的解吸剂。 本发明的装置由多个吸附塔组成，吸附塔分别选择性地吸附烯烃和两个蒸馏塔，用于分离烯烃/脱附剂和石蜡/脱附剂的混合气体。吸附塔的基本操作过程包括 从进料混合物中选择性吸附C4烯烃的吸附步骤，除去少量与C4烯烃一起吸附的C4链烷烃的C4烯烃漂洗步骤，以及通过使用脱附剂解吸C4烯烃的解吸步骤，还包括压力 平衡步骤，并流减压步骤和累积压力步骤，以根据吸附塔的操作压力提高烯烃的产率和浓度。 从该方法中排出的解吸剂与烯烃或链烷烃一起在蒸馏塔中分离，然后再循环。

公开(公告)号：US20100047771A1

公开(公告)日：2010-02-25

申请号：US11815198

申请日：2005-01-31

申请人： Jeong Ho Yoon ,  Se Nyun Kim ,  Jong Ho Park ,  Ja Eun Kim ,  Young-Hwa Song ,  Sung Han Kim ,  Dong Yoon Park

发明人： Jeong Ho Yoon ,  Se Nyun Kim ,  Jong Ho Park ,  Ja Eun Kim ,  Young-Hwa Song ,  Sung Han Kim ,  Dong Yoon Park

IPC分类号： C12Q1/68 ,  G01N33/53

CPC分类号： C12Q1/6886 ,  C12Q2600/158

摘要： Disclosed is a diagnostic marker specific for lung cancer. Also, the present invention relates to a composition and a kit, comprising an agent measuring the presence of the marker, and a method of diagnosing lung cancer using the composition or kit.

摘要翻译： 公开了肺癌特异性的诊断标记物。 此外，本发明涉及组合物和试剂盒，其包含测量标记物的存在的试剂，以及使用该组合物或试剂盒诊断肺癌的方法。

公开(公告)号：US20090250753A1

公开(公告)日：2009-10-08

申请号：US12414172

申请日：2009-03-30

申请人： Jong-ho Park ,  Chang-Ki Jeon ,  Hyi-Jeong Park ,  Hye-mi Kim

发明人： Jong-ho Park ,  Chang-Ki Jeon ,  Hyi-Jeong Park ,  Hye-mi Kim

IPC分类号： H01L29/78 ,  H01L27/06 ,  H01L21/336 ,  H01L21/8249

CPC分类号： H01L21/8249 ,  H01L21/823412 ,  H01L21/823418 ,  H01L21/823807 ,  H01L21/823814 ,  H01L27/0623 ,  H01L27/0922 ,  H01L29/0653 ,  H01L29/41766 ,  H01L29/456 ,  H01L29/66719 ,  H01L29/66727 ,  H01L29/7809 ,  H01L29/7812

摘要： Provided are a semiconductor device and a method of fabricating the semiconductor device. The semiconductor device using a DMOS device includes: a semiconductor substrate, in which a first conductive type well is formed; a first conductive type gate electrode formed on the semiconductor substrate with a gate insulating layer intervening between the gate electrode and the semiconductor substrate; a second conductive type body electrode formed on the semiconductor substrate and separated from the gate electrode; a first conductive type drain electrode formed on the semiconductor substrate and separated from the gate electrode and the body electrode; a second conductive type first body region formed in the well under the body electrode; a second conductive type second body region extending from the first body region to the gate insulating layer and formed in the well; a first conductive type source region formed in the second body region and extending from the first body region to the gate insulating layer; and a first conductive type source electrode extending from the source region to surround the gate electrode on the semiconductor substrate with an insulating layer intervening between the source electrode and gate electrode.

摘要翻译： 提供半导体器件和制造半导体器件的方法。 使用DMOS器件的半导体器件包括：形成第一导电型阱的半导体衬底; 形成在所述半导体衬底上的第一导电型栅极电极，所述栅极绝缘层介于所述栅电极和所述半导体衬底之间; 形成在所述半导体基板上并与所述栅电极分离的第二导电型体电极; 形成在所述半导体基板上并与所述栅电极和所述主体电极分离的第一导电型漏电极; 形成在所述体电极下方的所述阱内的第二导电型第一体区域; 第二导电类型的第二主体区域，其从所述第一主体区域延伸到所述栅极绝缘层并形成在所述阱中; 形成在所述第二主体区域中并从所述第一主体区域延伸到所述栅极绝缘层的第一导电型源极区域; 以及第一导电型源电极，其从所述源极区域延伸，以在所述半导体衬底上围绕所述栅极电极，所述绝缘层介于所述源电极和栅电极之间。

公开(公告)号：US20090230481A1

公开(公告)日：2009-09-17

申请号：US12401693

申请日：2009-03-11

申请人： Jong-ho Park ,  Chang-ki Jeon ,  Kyijeong Park

发明人： Jong-ho Park ,  Chang-ki Jeon ,  Kyijeong Park

IPC分类号： H01L27/06 ,  H01L21/60 ,  H01L21/28 ,  H01L21/70

CPC分类号： H01L21/8249 ,  H01L21/2256 ,  H01L21/823814 ,  H01L27/0623

摘要： Provided are a semiconductor device including a source/drain and a gate formed using a doped polysilicon process, and a method of fabricating the semiconductor device. The method comprises: forming a gate insulating layer on a part of an active region on a first conductivity type epitaxial layer; forming a conductive layer on the epitaxial layer; implanting high concentration impurities of a second conductivity type a first portion of the conductive layer on the gate insulating layer and second portions of the conductive layer on both sides of the first insulating layer; patterning the conductive layer; forming a second insulating layer on the epitaxial layer and high concentration impurity regions of the second conductivity type below the second conductive pattern; and implanting low-concentration impurities of the second conductivity type into the epitaxial layer between a gate structure and the high concentration impurity regions.

摘要翻译： 提供了包括使用掺杂多晶硅工艺形成的源极/漏极和栅极的半导体器件，以及制造半导体器件的方法。 该方法包括：在第一导电型外延层的有源区的一部分上形成栅极绝缘层; 在外延层上形成导电层; 将第二导电类型的高浓度杂质注入到第一绝缘层的栅绝缘层上的导电层的第一部分和导电层的第二部分上; 图案化导电层; 在所述外延层上形成第二绝缘层，在所述第二导电图案之下形成所述第二导电类型的高浓度杂质区; 以及将第二导电类型的低浓度杂质注入到栅极结构和高浓度杂质区之间的外延层中。

公开(公告)号：US07510934B2

公开(公告)日：2009-03-31

申请号：US11807544

申请日：2007-05-29

申请人： Seung-Pil Chung ,  Jong-Ho Park ,  Kyeong-Koo Chi ,  Dong-Hyun Kim

发明人： Seung-Pil Chung ,  Jong-Ho Park ,  Kyeong-Koo Chi ,  Dong-Hyun Kim

IPC分类号： H01L21/336

CPC分类号： H01L27/11521 ,  H01L27/115

摘要： A nonvolatile memory device includes a semiconductor substrate, a device isolation film, a tunnel insulation film, a plurality of floating gates, an inter-gate dielectric film, and a control gate pattern. Trenches are formed in the substrate that define active regions therebetween. The device isolation film is in the trenches in the substrate. The tunnel insulation film is on the active regions of the substrate. The plurality of floating gates are each on the tunnel insulation film over the active regions of the substrate. The inter-gate dielectric film extends across the floating gates and the device isolation film. The control gate pattern is on the inter-gate dielectric film and extends across the floating gates. A central region of the device isolation film in the trenches has an upper major surface that is recessed below an upper major surface of a surrounding region of the device isolation film in the trenches. An edge of the recessed central region of the device isolation film is aligned with a sidewall of an adjacent one of the floating gates.

摘要翻译： 非易失性存储器件包括半导体衬底，器件隔离膜，隧道绝缘膜，多个浮置栅极，栅极间电介质膜和控制栅极图案。 沟槽形成在衬底中，其间限定有效区域。 器件隔离膜位于衬底中的沟槽中。 隧道绝缘膜位于衬底的有源区上。 多个浮置栅极分别位于衬底的有源区上的隧道绝缘膜上。 栅极间电介质膜延伸穿过浮栅和器件隔离膜。 控制栅极图案在栅极间电介质膜上并且跨越浮动栅极延伸。 沟槽中的器件隔离膜的中心区域具有在沟槽中的器件隔离膜的周围区域的上主表面下方凹陷的上主表面。 器件隔离膜的凹入的中心区域的边缘与相邻的一个浮动栅极的侧壁对准。

公开(公告)号：US20090011308A1

公开(公告)日：2009-01-08

申请号：US12223566

申请日：2007-02-02

申请人： Eun-Sook Lee ,  Kyoung-Hun Yang ,  Hee-Rok Jung ,  Tae-Hee Kim ,  Sun-Kyung Han ,  Jeong-Kyou Lee ,  Yun-Hee Seo ,  Jong-Ho Park

发明人： Eun-Sook Lee ,  Kyoung-Hun Yang ,  Hee-Rok Jung ,  Tae-Hee Kim ,  Sun-Kyung Han ,  Jeong-Kyou Lee ,  Yun-Hee Seo ,  Jong-Ho Park

IPC分类号： H01M4/96 ,  H01M4/04

CPC分类号： H01M8/0245 ,  H01M4/8807 ,  H01M4/8821 ,  H01M8/0234 ,  H01M8/1007 ,  H01M8/1011 ,  H01M2008/1095 ,  Y02E60/523

摘要： A common method of preparing a gas diffusion layer for a fuel cell has problems in that a microporous layer is impregnated into a substrate, thereby lowering the porosity of the substrate, and cracks are created on a surface of a gas diffusion layer prepared using the method. Provided is a method of reproducibly preparing a gas diffusion layer with a uniform thickness and no cracks based on the principle of a primer coating method, wherein a first microporous layer is hardly impregnated into a substrate and uniformly covers a surface of the substrate, and at least one microporous layer is further coated on the first microporous layer. Provided is also a fuel cell showing improved performance by enhancing utilization of a catalyst layer and guaranteeing a uniform diffusion of fuel and an efficient discharge of a product.

摘要翻译： 制备燃料电池用气体扩散层的常用方法存在以下问题：将微孔层浸渍到基板中，从而降低基板的孔隙率，并且在使用该方法制备的气体扩散层的表面上产生裂纹 。 本发明提供一种基于底漆涂布方法的原理，可再现性地制备均匀厚度的气体扩散层和无裂缝的方法，其中第一微孔层几乎不浸渍到基材中并均匀地覆盖基材的表面，并且在 至少一个微孔层进一步涂覆在第一微孔层上。 还提供一种燃料电池，其通过提高催化剂层的利用和保证燃料的均匀扩散以及产品的有效排放而显示出改进的性能。

公开(公告)号：US20080293855A1

公开(公告)日：2008-11-27

申请号：US12160551

申请日：2007-02-21

申请人： Jin Hwan Kim ,  Dae Gi Ryu ,  Yong Lae Yi ,  Jong Ho Park

发明人： Jin Hwan Kim ,  Dae Gi Ryu ,  Yong Lae Yi ,  Jong Ho Park

IPC分类号： C08G12/32 ,  C08K5/1515 ,  C08K5/053

CPC分类号： H01B1/127 ,  C08L61/28 ,  C08L65/00 ,  C08L2666/16

摘要： The present invention relates to a polythiophene-based conductive polymer composition having high conductivity, transparency, waterproof property and durability, and a polymer membrane prepared by using the same. In particular, the present invention relates to a polythiophene-based conductive polymer composition comprising an aqueous solution of a polythiophene-based conductive polymer, an alcohol-based organic solvent, an amide-based organic solvent or an aprotic highly-dipolar solvent, a melamine resin and a binder selected among a polyester, a polyurethane resin and an alkoxy silane in a predetermined mixed ratio. The membrane prepared using the same has a high conductivity of less than 1 kΩ/m2 and a high transparency of higher than 95%, thus being applicable to of an anti-static film, a film for touch panel, a film for higher or lower electrode, a film for inorganic EL and a film for display electrode.

摘要翻译： 本发明涉及具有高导电性，透明性，防水性和耐久性的聚噻吩系导电性聚合物组合物及使用其的聚合物膜。 特别地，本发明涉及包含聚噻吩基导电聚合物，醇类有机溶剂，酰胺类有机溶剂或非质子高极性溶剂的水溶液的聚噻吩类导电聚合物组合物，三聚氰胺 树脂和选自聚酯，聚氨酯树脂和烷氧基硅烷中的粘合剂。 使用该膜制备的膜具有小于1kOmega / m 2的高导电率和高于95％的高透明度，因此可用于抗静电膜，触摸屏用膜，用于更高或更低的膜 电极，无机EL用膜和显示电极用膜。

公开(公告)号：US07242054B2

公开(公告)日：2007-07-10

申请号：US11190314

申请日：2005-07-26

申请人： Seung-Pil Chung ,  Jong-Ho Park ,  Kyeong-Koo Chi ,  Dong-Hyun Kim

发明人： Seung-Pil Chung ,  Jong-Ho Park ,  Kyeong-Koo Chi ,  Dong-Hyun Kim

IPC分类号： H01L29/788 ,  H01L29/423

CPC分类号： H01L27/11521 ,  H01L27/115

摘要： A nonvolatile memory device includes a semiconductor substrate, a device isolation film, a tunnel insulation film, a plurality of floating gates, an inter-gate dielectric film, and a control gate pattern. Trenches are formed in the substrate that define active regions therebetween. The device isolation film is in the trenches in the substrate. The tunnel insulation film is on the active regions of the substrate. The plurality of floating gates are each on the tunnel insulation film over the active regions of the substrate. The inter-gate dielectric film extends across the floating gates and the device isolation film. The control gate pattern is on the inter-gate dielectric film and extends across the floating gates. A central region of the device isolation film in the trenches has an upper major surface that is recessed below an upper major surface of a surrounding region of the device isolation film in the trenches. An edge of the recessed central region of the device isolation film is aligned with a sidewall of an adjacent one of the floating gates.

摘要翻译： 非易失性存储器件包括半导体衬底，器件隔离膜，隧道绝缘膜，多个浮置栅极，栅极间电介质膜和控制栅极图案。 沟槽形成在衬底中，其间限定有效区域。 器件隔离膜位于衬底中的沟槽中。 隧道绝缘膜位于衬底的有源区上。 多个浮置栅极分别位于衬底的有源区上的隧道绝缘膜上。 栅极间电介质膜延伸穿过浮栅和器件隔离膜。 控制栅极图案在栅极间电介质膜上并且跨越浮动栅极延伸。 沟槽中的器件隔离膜的中心区域具有在沟槽中的器件隔离膜的周围区域的上主表面下方凹陷的上主表面。 器件隔离膜的凹入的中心区域的边缘与相邻的一个浮动栅极的侧壁对准。

公开(公告)号：US20060285526A1

公开(公告)日：2006-12-21

申请号：US11451650

申请日：2006-06-13

申请人： Kyung-Hun Jang ,  Young-Soo Kim ,  Jung-Hoon Suh ,  Dong-Jun Lee ,  Jong-Ho Park ,  Tae-Jin Lee

发明人： Kyung-Hun Jang ,  Young-Soo Kim ,  Jung-Hoon Suh ,  Dong-Jun Lee ,  Jong-Ho Park ,  Tae-Jin Lee

IPC分类号： H04Q7/24

CPC分类号： H04W52/0216 ,  H04W52/0232 ,  Y02D70/142

摘要： A power saving apparatus and a method in a wireless communication system are provided. An Access Point (AP) buffers transmission frames for sleep-mode stations in a sleep-mode buffer. Upon wakeup from a sleep mode, a station sends a first control information frame indicating wakeup to the access point. The access point sends a second control information frame including a requested transmission length in response to the first control information frame to the station. The station generates a third control information frame, aggregates the third control information frame and user data frames to a first protocol data unit, and sends it to the AP. Then the AP generates a fourth control information frame, aggregates the fourth control information frame and buffered frames to a second protocol data unit, and sends it to the station.

摘要翻译： 提供了无线通信系统中的省电装置和方法。 接入点（AP）缓冲睡眠模式缓冲器中睡眠模式站的传输帧。 当从睡眠模式唤醒时，站向接入点发送指示唤醒的第一控制信息帧。 接入点响应于第一控制信息帧向站发送包括所请求的传输长度的第二控制信息帧。 站产生第三控制信息帧，将第三控制信息帧和用户数据帧聚合到第一协议数据单元，并将其发送到AP。 然后AP生成第四控制信息帧，将第四控制信息帧和缓冲帧聚合到第二协议数据单元，并将其发送到站。