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1014 条记录 (耗时 0.029 秒)

    Multidrop network system and network device
    12.
    发明授权
    Multidrop network system and network device 有权

    公开(公告)号：US11750434B2

    公开(公告)日：2023-09-05

    申请号：US17697466

    申请日：2022-03-17

    申请人： REALTEK SEMICONDUCTOR CORPORATION

    发明人： Yung-Le Chang ,  Li-Chung Chen ,  Yuan-Jih Chu ,  Shieh-Hsing Kuo

    IPC分类号： H04L27/01 ,  H04L27/26 ,  G06F18/214

    CPC分类号： H04L27/2655 ,  G06F18/214 ,  H04L27/01

    摘要： A multidrop network system includes N network devices including a master device and a plurality of slave devices. The N network devices synchronize their respective time zones in a synchronization phase, then jointly perform equalizer coefficient training in a training phase, and then obtain their respective transmission opportunities in turn in a data transmission phase. Each network device includes a channel equalizer trained in the training phase and used for processing data in the data transmission phase. In the training phase, the master device sends out a training notification to request the slave devices to enter the training phase; the master device performs the equalizer coefficient training after it transmits the training notification, and the slave devices perform the equalizer coefficient training after they receive the training notification. After the completion of the equalizer coefficient training, the master device sends out a beacon to start the data transmission phase.

    Receiver/transmitter co-calibration of voltage levels in pulse amplitude modulation links
    13.
    发明授权
    Receiver/transmitter co-calibration of voltage levels in pulse amplitude modulation links 有权

    公开(公告)号：US11711246B2

    公开(公告)日：2023-07-25

    申请号：US17711328

    申请日：2022-04-01

    申请人： Rambus Inc.

    发明人： Reza Navid

    IPC分类号： H04L25/03 ,  H04L27/01 ,  H04L27/04 ,  H04L27/08 ,  H04L27/26

    CPC分类号： H04L25/03267 ,  H04L27/01 ,  H04L27/04 ,  H04L27/08 ,  H04L27/2679

    摘要： A driver circuit of a PAM-N transmitting device transmits a PAM-N signal via a communication channel, wherein N is greater than 2, and the PAM-N signal has N signal levels corresponding to N symbols. A PAM-N receiving device receives the PAM-N signal. The PAM-N receiving device generates distortion information indicative of a level of distortion corresponding to inequalities in voltage differences between the N signal levels. The PAM-N receiving device transmits to the PAM-N transmitting device the distortion information indicative of the level of the distortion. The PAM-N transmitting device receives the distortion information. The PAM-N transmitting device adjusts one or more drive strength parameters of the driver circuit of the PAM-N transmitting device based on the distortion information.

    Symbol judgement apparatus and symbol judgement method
    14.
    发明授权
    Symbol judgement apparatus and symbol judgement method 有权

    公开(公告)号：US11706065B2

    公开(公告)日：2023-07-18

    申请号：US17594926

    申请日：2020-05-08

    申请人： NIPPON TELEGRAPH AND TELEPHONE CORPORATION

    发明人： Hiroki Taniguchi ,  Masanori Nakamura ,  Shuto Yamamoto ,  Akira Masuda ,  Yoshiaki Kisaka

    IPC分类号： H04L27/01

    CPC分类号： H04L27/01

    摘要： A device generates a symbol sequence by performing adaptive equalization by an estimation inverse transfer function of a transmission line on a reception signal sequence extracted from the transmission line, and performing provisional determination on the symbol sequence generated; generates a plurality of the symbol sequences indicating transmission line states in a range of a provisional determination symbol provisionally determined and nearby symbols of the provisional determination symbol; generates, based on the plurality of the symbol sequences indicating the transmission line states generated and an estimation transfer function of the transmission line, an estimation reception symbol sequence for each of the transmission line states; calculates a metric between the symbol sequence obtained from the reception signal sequence and each of a plurality of the estimation reception symbol sequences; selects a most likelihood estimation reception symbol sequence of the plurality of the estimation reception symbol sequences, based on the calculated metric, the provisional determination symbol, and the nearby symbols of the provisional determination symbol; and determines a transmission symbol sequence.

    Contiunous Time Pre-Cursor and Post-Cursor Compensation Circuits
    18.
    发明申请
    Contiunous Time Pre-Cursor and Post-Cursor Compensation Circuits 审中-公开

    公开(公告)号：US20190158322A1

    公开(公告)日：2019-05-23

    申请号：US16250600

    申请日：2019-01-17

    申请人： Avago Technologies International Sales Pte. Limited

    发明人： Hiroshi KIMURA ,  Haoqiong CHEN ,  Yehui SUN

    IPC分类号： H04L25/03

    CPC分类号： H04L25/03025 ,  H03K17/161 ,  H03K19/017509 ,  H04L25/03343 ,  H04L27/01

    摘要： To improve on power and bandwidth limitations associated with conventional feedforward equalizer (FFE) implementations, the present disclosure provides intersymbol interference (ISI) compensation circuits that do not use delay cells common to FFE structures. In one example, the compensation circuit of the present disclosure comprises a two stage amplifier. Each stage of the amplifier is implemented using a differential pair with degeneration. One of the amplifier stages has a transfer function with a zero in the left half of the s-domain, also called the s-plane, and the other amplifier has a transfer function with a zero in the right half of the s-domain. The amplifier stage with the zero in the left half of the s-domain can be used to provide post-cursor ISI compensation, and the amplifier stage with the zero in the right half of the s-domain can be used to provide pre-cursor ISI compensation.

    ADC BASED RECEIVER
    20.
    发明申请
    ADC BASED RECEIVER 审中-公开

    公开(公告)号：US20180287837A1

    公开(公告)日：2018-10-04

    申请号：US15471364

    申请日：2017-03-28

    申请人： Xilinx, Inc.

    发明人： Hongtao Zhang ,  Yohan Frans ,  Geoffrey Zhang

    IPC分类号： H04L27/01 ,  H04B1/06

    CPC分类号： H04L27/01 ,  H03M1/182 ,  H03M1/361 ,  H04B1/06 ,  H04B2203/5425 ,  H04L25/063 ,  H04Q2213/03

    摘要： A receiver includes: an automatic gain controller (AGC) configured to receive an analog signal; an analog-to-digital converter (ADC) configured to receive an output from the AGC and to output a digitized signal, wherein a most significant bit of the digitized signal corresponds to a sliced data, and a least significant bit of the digitized signal corresponds to an error signal; and an adaptation unit configured to control the AGC, the ADC, or both the AGC and the ADC, based at least in part on the digitized signal to achieve a desired data digitization and data slicing.