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公开(公告)号：US20240234577A1
公开(公告)日：2024-07-11
申请号：US17926189
申请日：2022-11-11
Inventor： Zhifu LI , Guanghui LIU , Chao DAI , Fei AI , Dewei SONG , Chengzhi LUO
IPC: H01L29/786 , H01L29/417 , H01L29/423
CPC classification number: H01L29/78642 , H01L29/41733 , H01L29/41741 , H01L29/42392
Abstract: A semiconductor device and an electronic device are provided. A through hole is formed in an insulating layer and located on a first active layer. A thin-film transistor layer includes a third active layer. At least part of the third active layer is located on a sidewall of the through hole. One side of the third active layer is connected to a first active layer, and the other side of the third active layer is connected to a second active layer, so that a channel length is reduced, short channel effect is reduced, on-state current is increased, and power consumption is reduced.
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公开(公告)号：US20230378185A1
公开(公告)日：2023-11-23
申请号：US17781309
申请日：2022-05-30
Inventor： Chengzhi LUO
IPC: H01L27/12
CPC classification number: H01L27/1222 , H01L27/127
Abstract: Embodiments of the present disclosure provide an array substrate, a preparation method thereof, and a display panel, where the array substrate includes a first filter layer, an active layer, and a second filter layer. By reflecting the light to the second filter layer through the first filter layer, and then reflecting the light to the active layer through the second filter layer, the active layer can act as a photosensitive unit to meet a requirement for detecting an ultraviolet intensity in the ambient light.
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公开(公告)号：US20240258340A1
公开(公告)日：2024-08-01
申请号：US17618580
申请日：2021-10-29
Inventor： Chengzhi LUO
IPC: H01L27/12
CPC classification number: H01L27/1248 , H01L27/1225
Abstract: A display panel and an array substrate are provided. The array substrate includes a first thin film transistor of a vertical structure. The first TFT includes a first source, an interlayer insulating layer, a first gate, a first drain, and a first active layer. The interlayer insulating layer covers the first source. A hole penetrates the interlayer insulating layer. The first gate is embedded in the interlayer insulating layer. The first drain is disposed on a side of the insulating layer away from the first source. The first active layer connects to the first source and the first drain via the hole.
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公开(公告)号：US20240219784A1
公开(公告)日：2024-07-04
申请号：US17924412
申请日：2022-11-03
Inventor： Chengzhi LUO
IPC: G02F1/1362 , G02F1/1333 , G02F1/1335
CPC classification number: G02F1/136209 , G02F1/133302 , G02F1/133507
Abstract: A display panel and a display device are provided. The display panel includes a non-opening region and opening regions. The display panel includes a substrate. The substrate is located on a side of the display panel away from a light-exiting surface. The substrate includes a first base layer, a second base layer, and a third base layer. A first interface is formed between the second base layer and the first base layer. A second interface is formed between the third base layer and the second base layer.
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公开(公告)号：US20220128849A1
公开(公告)日：2022-04-28
申请号：US16772784
申请日：2019-11-11
Inventor： Chengzhi LUO
IPC: G02F1/1368 , G02F1/1362 , H01L27/12
Abstract: The present disclosure provides a display panel and a manufacturing method of the display panel, and the display panel includes an array substrate. The array substrate includes a planarization layer, a first protective layer, a first electrode layer, and a passivation layer. The passivation layer is made of silicon-based inorganic dielectric material, so as to improve light transmittance of the passivation layer. A first protective layer is added between the planarization layer and the first electrode layer to support the first electrode layer, thereby improving light transmittance of the display panel.
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Patent Agency Ranking
公开(公告)号：US20220078399A1
公开(公告)日：2022-03-10
申请号：US16630474
申请日：2019-11-07
Inventor： Chengzhi LUO
IPC: H04N13/312 , G02F1/13363 , G02F1/1335
Abstract: A 3D display device and a manufacturing method thereof are provided. Metal nanowires perpendicular to each other are provided at the TFT glass substrate side and the CF glass substrate side. The metal nanowires can realize inherent function of polarizers at the TFT glass substrate side and the CF glass substrate side, and can also make the emitted light into stripe-shaped polarized light perpendicular to each other. Therefore, the polarizers, the λ/2 phase retarder with stripes, and the polarizers with stripes and perpendicular polarization that are originally at the TFT glass substrate side and the CF glass substrate side in a 3D polarizer display are excluded. The thickness of the 3D display device is made thinner. Moreover, according to the structural design, polarization effect is not limited by wavelength range of the light. Therefore, 3D stereoscopic display effect is greatly enhanced.
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公开(公告)号：US20210126022A1
公开(公告)日：2021-04-29
申请号：US16772834
申请日：2019-11-12
Inventor： Chengzhi LUO
IPC: H01L27/12 , H01L29/786 , H01L29/66 , G02F1/1368
Abstract: The present disclosure provides an array substrate and a method for manufacturing the same. By disposing hybrid TFT on the substrate which includes disposing an oxide TFT in a display driving area and disposing an LTPS TFT in a non-display driving area, not only can a driving current of an LCD gate driving circuit be improved, but a leakage current can also be diminished when LCD display pixels are driven. When manufacturing a hybrid TFT structure, a second active layer in the display driving area is disposed on a first active layer, and a semiconductor insulation layer is disposed between the first active layer and the second active layer, so that patterns of the first active layer and the second active layer can be formed by etching through one mask during an etching process, thus reducing manufacturing cost.
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公开(公告)号：US20250113615A1
公开(公告)日：2025-04-03
申请号：US18289038
申请日：2023-09-21
Inventor： Chengzhi LUO
Abstract: An embodiment of the present disclosure discloses an array substrate and a display panel; The array substrate has a display region and includes a substrate, and a thin film transistor layer on a side of the substrate. The thin film transistor layer includes a plurality of first thin film transistors arranged in a first direction, the first thin film transistors are located in the display region, the second gates of adjacent first thin film transistors are connected in the first direction, and the first gates of at least two first thin film transistors are arranged at intervals.
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公开(公告)号：US20250035981A1
公开(公告)日：2025-01-30
申请号：US18915693
申请日：2024-10-15
Inventor： Fei AI , Dewei SONG , Chengzhi LUO
IPC: G02F1/1335 , G02F1/1333 , G02F1/1368
Abstract: The present disclosure provides a display panel and a display device including the display panel. The display panel includes an array substrate including a light inlet side and a light outlet side oppositely arranged, including a plurality of opening regions for passing though light and a plurality of non-opening regions in addition to the plurality of opening regions, and including an insulation structure. The insulation structure includes a first groove located in the opening regions, recessed in a direction from the light outlet side toward the light inlet side, and filled with insulation materials. The insulation materials include a first insulation layer and a second insulation layer disposed on one side of the first insulation layer close to the light inlet side. The second insulation layer has a refractive index less than a refractive index of the first insulation layer.
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公开(公告)号：US20240234576A1
公开(公告)日：2024-07-11
申请号：US17925085
申请日：2022-11-04
Inventor： Zhifu LI , Guanghui LIU , Fei AI , Dewei SONG , Chengzhi LUO
IPC: H01L29/786 , H01L27/12 , H01L29/66
CPC classification number: H01L29/78642 , H01L27/1222 , H01L27/127 , H01L29/6675 , H01L29/78618 , H01L29/78633 , H01L29/78672 , H01L29/78696
Abstract: The present application provides a thin-film transistor having a vertical structure and an electronic device. In the thin-film transistor having the vertical structure, the thin-film transistor includes a first doped portion and a second portion, the second doped portion is connected to and partly in contact with a channel portion through a via hole by arranging the second doped portion in the via hole of an insulating layer, which can reduce a contact area between the second doped portion and the channel portion, thereby reducing ions diffusing into a channel region and improving device stability of the thin-film transistor. Also, in the thin-film transistor having the vertical structure, a projection area of the thin-film transistor can be reduced, improving an aperture ratio of a display panel.
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