公开(公告)号：US20190103496A1

公开(公告)日：2019-04-04

申请号：US16194018

申请日：2018-11-16

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Jean-Pierre COLINGE ,  Chung-Cheng WU ,  Carlos H. DIAZ ,  Chih-Hao WANG ,  Ken-Ichi GOTO ,  Ta-Pen GUO ,  Yee-Chia YEO ,  Zhiqiang WU ,  Yu-Ming LIN

IPC: H01L29/786 ,  H01L29/66 ,  H01L29/78 ,  H01L21/8238 ,  H01L27/088 ,  H01L21/02 ,  H01L29/24 ,  H01L29/16 ,  H01L21/8256

Abstract: Semiconductor structures including two-dimensional (2-D) materials and methods of manufacture thereof are described. By implementing 2-D materials in transistor gate architectures such as field-effect transistors (FETs), the semiconductor structures in accordance with this disclosure include vertical gate structures and incorporate 2-D materials such as graphene, transition metal dichalcogenides (TMDs), or phosphorene.

公开(公告)号：US20180334383A1

公开(公告)日：2018-11-22

申请号：US16009668

申请日：2018-06-15

Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.

Inventor： Hsin-Ping CHEN ,  Carlos H. DIAZ ,  Ken-Ichi GOTO ,  Shau-Lin SHUE ,  Tai-I YANG

IPC: B82B1/00 ,  B82B3/00

Abstract: A NEMS device structure and a method for forming the same are provided. The NEMS device structure includes a substrate and an interconnect structure formed over the substrate. The NEMS device structure includes a dielectric layer formed over the interconnect structure and a beam structure formed in and over the dielectric layer, wherein the beam structure includes a plurality of strip structures. The NEMS device structure includes a cap structure formed over the dielectric layer and the beam structure and a cavity formed between the beam structure and the cap structure.

公开(公告)号：US20140103438A1

公开(公告)日：2014-04-17

申请号：US14108391

申请日：2013-12-17

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Chih-Ching WANG ,  Jon-Hsu HO ,  Ching-Fang HUANG ,  Wen-Hsing HSIEH ,  Tsung-Hsing YU ,  Yi-Ming SHEU ,  Ken-Ichi GOTO ,  Zhiqiang WU

IPC: H01L29/78

CPC classification number: H01L29/7855 ,  H01L21/823431 ,  H01L21/823821 ,  H01L27/0886 ,  H01L27/0924 ,  H01L29/66795 ,  H01L29/785

Abstract: A multi-gate semiconductor device and method for forming the same. A multi-gate semiconductor device is formed including a first fin of a first transistor formed on a semiconductor substrate having a first dopant type. The first transistor has a doped channel region of the first dopant type. The device also includes a second fin of a second transistor formed on the first dopant type semiconductor substrate. The second transistor has a doped channel region of a second dopant type. The device further includes a gate electrode layer of the second dopant type formed over the channel region of the first fin and a gate electrode layer of the first dopant type formed over the channel region of the second fin.

Abstract translation: 一种多栅半导体器件及其制造方法。 形成多栅半导体器件，其包括形成在具有第一掺杂剂类型的半导体衬底上的第一晶体管的第一鳍。 第一晶体管具有第一掺杂剂类型的掺杂沟道区。 该器件还包括形成在第一掺杂剂型半导体衬底上的第二晶体管的第二鳍。 第二晶体管具有第二掺杂剂类型的掺杂沟道区。 该器件还包括形成在第一鳍片的沟道区域上的第二掺杂剂类型的栅极电极层和形成在第二鳍片的沟道区域上的第一掺杂剂类型的栅极电极层。