公开(公告)号：US20240395740A1

公开(公告)日：2024-11-28

申请号：US18790354

申请日：2024-07-31

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Jun-De JIN

IPC: H01L23/66 ,  H01L23/528 ,  H01L27/088 ,  H01L29/06 ,  H01L29/417

Abstract: Devices and methods for enhancing insertion loss performance of an antenna switch are disclosed. In one example, a semiconductor device formed to serve as an antenna switch is disclosed. The semiconductor device includes: a substrate, a dielectric layer and a polysilicon region. The substrate includes: an intrinsic substrate; a metal-oxide-semiconductor device extending into the intrinsic substrate; and at least one isolation feature extending into and in contact with the intrinsic substrate. The at least one isolation feature is disposed adjacent to the metal-oxide-semiconductor device.

公开(公告)号：US20240312982A1

公开(公告)日：2024-09-19

申请号：US18669378

申请日：2024-05-20

Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.

Inventor： Jun-De JIN ,  Tzu-Jin YEH

IPC: H01L27/06 ,  H01L29/06 ,  H01L29/423

CPC classification number: H01L27/0629 ,  H01L29/0653 ,  H01L29/4238

Abstract: A semiconductor device is provided. The semiconductor device includes a substrate, a transistor, at least one isolation and at least one non-doped region. The substrate includes a lower portion. The transistor is disposed on the lower portion. The at least one isolation is adjacent to the transistor, and disposed on the lower portion. The at least one non-doped region is disposed between and adjacent to the isolation and the lower portion.

公开(公告)号：US20210091018A1

公开(公告)日：2021-03-25

申请号：US17111343

申请日：2020-12-03

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Jun-De JIN

IPC: H01L23/66 ,  H01L29/06 ,  H01L23/528 ,  H01L29/417 ,  H01L27/088

Abstract: Devices and methods for enhancing insertion loss performance of an antenna switch are disclosed. In one example, a semiconductor device formed to serve as an antenna switch is disclosed. The semiconductor device includes: a substrate, a dielectric layer and a polysilicon region. The substrate includes: an intrinsic substrate; a metal-oxide-semiconductor device extending into the intrinsic substrate; and at least one isolation feature extending into and in contact with the intrinsic substrate. The at least one isolation feature is disposed adjacent to the metal-oxide-semiconductor device.

公开(公告)号：US20190304937A1

公开(公告)日：2019-10-03

申请号：US16364439

申请日：2019-03-26

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Jun-De JIN

IPC: H01L23/66 ,  H01L29/06 ,  H01L29/417 ,  H01L27/088 ,  H01L23/528

Abstract: Devices and methods for enhancing insertion loss performance of an antenna switch are disclosed. In one example, a semiconductor device formed to serve as an antenna switch is disclosed. The semiconductor device includes: a substrate, a dielectric layer and a polysilicon region. The substrate includes: an intrinsic substrate; a metal-oxide-semiconductor device extending into the intrinsic substrate; and at least one isolation feature extending into and in contact with the intrinsic substrate. The at least one isolation feature is disposed adjacent to the metal-oxide-semiconductor device.

公开(公告)号：US20150015336A1

公开(公告)日：2015-01-15

申请号：US13939209

申请日：2013-07-11

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Tzu-Jin YEH ,  Chewn-Pu JOU ,  Jun-De JIN ,  Hsieh-Hung HSIEH ,  Chia-Chung CHEN

IPC: H03F3/213 ,  H01L21/8238

CPC classification number: H03F3/213 ,  H01L21/8238 ,  H01L27/092 ,  H01L2924/3011 ,  H03F1/223

Abstract: A circuit includes a first CMOS device forming a gain stage of a power amplifier and a second CMOS device forming a voltage buffer stage of the power amplifier. The first CMOS device includes a first doped well formed in a substrate, a first drain region and a first source region spaced laterally from one another in the first doped well, and a first gate structure formed over a first channel region in the first doped well. The second CMOS device includes a second doped well formed in the semiconductor substrate such that the first doped well and the second is disposed adjacent to the second doped well. A second drain region and a second source region are spaced laterally from one another in the second doped well, and a second gate structure formed over a second channel region in the second doped well.

Abstract translation: 电路包括形成功率放大器的增益级的第一CMOS器件和形成功率放大器的电压缓冲级的第二CMOS器件。 第一CMOS器件包括形成在衬底中的第一掺杂阱，第一漏极区和在第一掺杂阱中彼此横向间隔开的第一源极区，以及形成在第一掺杂阱中的第一沟道区上的第一栅极结构 。 第二CMOS器件包括在半导体衬底中形成的第二掺杂阱，使得第一掺杂阱和第二掺杂阱邻近第二掺杂阱设置。 第二漏极区域和第二源极区域在第二掺杂阱中彼此横向隔开，第二栅极结构形成在第二掺杂阱中的第二沟道区域上。

公开(公告)号：US20140256063A1

公开(公告)日：2014-09-11

申请号：US14280732

申请日：2014-05-19

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Ping-Lin YANG ,  Jun-De JIN ,  Fu-Lung HSUEH ,  Sa-Lly LIU ,  Tong-Chern ONG ,  Chun-Jung LIN ,  Ya-Chen KAO

IPC: H01L25/065 ,  H01L23/522

CPC classification number: H01L25/0657 ,  H01F5/00 ,  H01F27/2804 ,  H01F41/046 ,  H01F2027/2809 ,  H01L23/48 ,  H01L23/5227 ,  H01L2225/06531 ,  H01L2924/0002 ,  Y10T29/4902 ,  H01L2924/00

Abstract: A communications structure comprises a first semiconductor substrate having a first coil, and a second semiconductor substrate having a second coil above the first semiconductor substrate. Inner edges of the first and second coils define a boundary of a volume that extends below the first coil and above the second coil. A ferromagnetic core is positioned at least partially within the boundary, such that a mutual inductance is provided between the first and second coils for wireless transmission of signals or power between the first and second coils.

Abstract translation: 通信结构包括具有第一线圈的第一半导体衬底和在第一半导体衬底上方具有第二线圈的第二半导体衬底。 第一和第二线圈的内边缘限定在第一线圈下方延伸并在第二线圈之上的体积的边界。 铁磁芯至少部分地位于边界内，使得在第一和第二线圈之间提供互感以在第一和第二线圈之间无线地传输信号或电力。