公开(公告)号：US10319581B1

公开(公告)日：2019-06-11

申请号：US15827709

申请日：2017-11-30

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Ming-Chang Wen ,  Chang-Yun Chang ,  Hsien-Chin Lin ,  Hung-Kai Chen

IPC: H01L21/02 ,  H01L21/3215 ,  H01L21/3105 ,  H01L29/06 ,  H01L29/66 ,  H01L21/762 ,  H01L29/78 ,  H01L21/8258

Abstract: A method includes providing a structure having a substrate and first and second fins over the substrate and oriented lengthwise generally along a first direction; epitaxially growing semiconductor source/drain (S/D) features over the first and second fins, wherein a first semiconductor S/D feature over the first fin merges with a second semiconductor S/D feature over the second fin; and performing a first etching process to an area between the first and second fins, wherein the first etching process separates the first and second semiconductor S/D features.

公开(公告)号：US20190164741A1

公开(公告)日：2019-05-30

申请号：US15827709

申请日：2017-11-30

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Ming-Chang Wen ,  Chang-Yun Chang ,  Hsien-Chin Lin ,  Hung-Kai Chen

IPC: H01L21/02 ,  H01L21/3215 ,  H01L21/3105 ,  H01L21/8258 ,  H01L29/66 ,  H01L21/762 ,  H01L29/78 ,  H01L29/06

Abstract: A method includes providing a structure having a substrate and first and second fins over the substrate and oriented lengthwise generally along a first direction; epitaxially growing semiconductor source/drain (S/D) features over the first and second fins, wherein a first semiconductor S/D feature over the first fin merges with a second semiconductor S/D feature over the second fin; and performing a first etching process to an area between the first and second fins, wherein the first etching process separates the first and second semiconductor S/D features.

公开(公告)号：US11948842B2

公开(公告)日：2024-04-02

申请号：US17240007

申请日：2021-04-26

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Ming-Chang Wen ,  Chang-Yun Chang ,  Hsien-Chin Lin ,  Hung-Kai Chen

IPC: H01L21/8234 ,  H01L21/762 ,  H01L27/088 ,  H01L29/06 ,  H01L29/49 ,  H01L29/51 ,  H01L29/66

CPC classification number: H01L21/823481 ,  H01L21/762 ,  H01L21/76229 ,  H01L21/823431 ,  H01L27/0886 ,  H01L29/0649 ,  H01L29/4966 ,  H01L29/517 ,  H01L29/66545

Abstract: A device includes a substrate; semiconductor fins extending from the substrate; a liner layer on sidewalls of the semiconductor fins; an etch stop layer over the substrate and extending laterally from a first portion of the liner layer on a first one of the semiconductor fins to a second portion of the line layer on a second one of the semiconductor fins; an isolation structure over the etch stop layer, wherein the etch stop layer and the isolation structure include different materials; a gate dielectric layer over a top surface of the isolation structure; and a dielectric feature extending through the gate dielectric layer and into the isolation structure, wherein the isolation structure and the dielectric feature collectively extend laterally from the first portion of the liner layer to the second portion of the line layer.

公开(公告)号：US20220157595A1

公开(公告)日：2022-05-19

申请号：US17588883

申请日：2022-01-31

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Ming-Chang Wen ,  Chang-Yun Chang ,  Hsien-Chin Lin ,  Hung-Kai Chen

IPC: H01L21/02 ,  H01L21/3215 ,  H01L21/3105 ,  H01L29/06 ,  H01L29/66 ,  H01L29/78 ,  H01L21/8258 ,  H01L21/8238

Abstract: A semiconductor structure includes a substrate; an isolation structure over the substrate; a first fin extending from the substrate and through the isolation structure; a first source/drain structure over the first fin; a contact etch stop layer over the isolation structure and contacting a first side face of the first source/drain structure; and a first dielectric structure contacting a second side face of the first source/drain structure. The first side face and the second side face are on opposite sides of the first fin in a cross-sectional view cut along a widthwise direction of the first fin. The first dielectric structure extends higher than the first source/drain structure.

公开(公告)号：US10978351B2

公开(公告)日：2021-04-13

申请号：US15816155

申请日：2017-11-17

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Ming-Chang Wen ,  Chang-Yun Chang ,  Hsien-Chin Lin ,  Hung-Kai Chen

IPC: H01L21/8234 ,  H01L27/088 ,  H01L29/06 ,  H01L21/762 ,  H01L29/66 ,  H01L29/49 ,  H01L29/51

Abstract: A device that includes a substrate; semiconductor fins extending from the substrate; an isolation structure over the substrate and laterally between the semiconductor fins; a liner layer between sidewalls of the semiconductor fins and the isolation structure; and an etch stop layer between the substrate and the isolation structure and laterally between the semiconductor fins. The etch stop layer includes a material different than that of the isolation structure and the liner layer.

公开(公告)号：US20200251325A1

公开(公告)日：2020-08-06

申请号：US16854627

申请日：2020-04-21

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Ming-Chang Wen ,  Chang-Yun Chang ,  Hsien-Chin Lin ,  Hung-Kai Chen

IPC: H01L21/02 ,  H01L29/78 ,  H01L21/8238 ,  H01L21/8258 ,  H01L29/66 ,  H01L29/06 ,  H01L21/3105 ,  H01L21/3215

Abstract: A semiconductor structure includes a substrate, a pair of first fins extending from the substrate, a pair of second fins extending from the substrate, an isolation feature over the substrate and separating bottom portions of the first and the second fins, a pair of first epitaxial semiconductor features over the pair of first fins respectively, a pair of second epitaxial semiconductor features over the pair of second fins respectively, and a first dielectric feature sandwiched between and separating the pair of first epitaxial semiconductor features. The pair of second epitaxial semiconductor features merge with each other.

公开(公告)号：US20200091008A1

公开(公告)日：2020-03-19

申请号：US16690177

申请日：2019-11-21

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Ming-Chang Wen ,  Chang-Yun Chang ,  Hsien-Chin Lin ,  Hung-Kai Chen

IPC: H01L21/8234 ,  H01L29/06 ,  H01L27/088 ,  H01L21/762

Abstract: A device includes a substrate; semiconductor fins extending from the substrate; an isolation structure over the substrate and laterally between the semiconductor fins; a liner layer between sidewalls of the semiconductor fins and the isolation structure; and an etch stop layer between the substrate and the isolation structure and laterally between the semiconductor fins. The etch stop layer includes a material different than that of the isolation structure and the liner layer.

公开(公告)号：US20190318922A1

公开(公告)日：2019-10-17

申请号：US16421532

申请日：2019-05-24

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Ming-Chang Wen ,  Chang-Yun Chang ,  Hsien-Chin Lin ,  Hung-Kai Chen

IPC: H01L21/02 ,  H01L21/3215 ,  H01L29/66 ,  H01L21/3105 ,  H01L29/78 ,  H01L21/8258 ,  H01L29/06

Abstract: A semiconductor structure includes a substrate; first and second fins extending from the substrate and oriented lengthwise generally along a first direction; an isolation feature over the substrate and separating bottom portions of the first and the second fins; first and second epitaxial semiconductor features over the first and the second fins, respectively; and a first dielectric feature sandwiched between the first and the second epitaxial semiconductor features. A maximum width of the first dielectric feature is smaller than a width of the isolation feature between the first and the second fins along a second direction perpendicular to the first direction.

公开(公告)号：US20190157159A1

公开(公告)日：2019-05-23

申请号：US15816155

申请日：2017-11-17

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Ming-Chang Wen ,  Chang-Yun Chang ,  Hsien-Chin Lin ,  Hung-Kai Chen

IPC: H01L21/8234 ,  H01L27/088 ,  H01L29/06 ,  H01L29/51 ,  H01L29/49 ,  H01L29/66

Abstract: A device that includes a substrate; semiconductor fins extending from the substrate; an isolation structure over the substrate and laterally between the semiconductor fins; a liner layer between sidewalls of the semiconductor fins and the isolation structure; and an etch stop layer between the substrate and the isolation structure and laterally between the semiconductor fins. The etch stop layer includes a material different than that of the isolation structure and the liner layer.

公开(公告)号：US10224245B2

公开(公告)日：2019-03-05

申请号：US15076762

申请日：2016-03-22

Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.

Inventor： Chia-Pin Lin ,  Chien-Tai Chan ,  Hsien-Chin Lin ,  Shyue-Shyh Lin

IPC: H01L29/76 ,  H01L21/8234 ,  H01L29/06 ,  H01L29/08 ,  H01L29/161 ,  H01L29/78 ,  H01L21/8238 ,  H01L29/66 ,  H01L29/165

Abstract: A method includes forming first and second fins of a finFET extending above a semiconductor substrate, with a shallow trench isolation (STI) region in between, and a distance between a top surface of the STI region and top surfaces of the first and second fins. First and second fin extensions are provided on top and side surfaces of the first and second fins above the top surface of the STI region. Material is removed from the STI region, to increase the distance between the top surface of the STI region and top surfaces of the first and second fins. A conformal stressor dielectric material is deposited over the fins and STI region. The conformal dielectric stressor material is reflowed, to flow into a space between the first and second fins above a top surface of the STI region, to apply stress to a channel of the finFET.