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    Electronic device for performing device-to-device communication and method therefor
    11.
    发明授权
    Electronic device for performing device-to-device communication and method therefor 有权

    公开(公告)号：US11425668B2

    公开(公告)日：2022-08-23

    申请号：US16979761

    申请日：2019-03-11

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： Yusung Joo ,  Jaejun Lee ,  Jaesung Park ,  Wonshik Yoon

    IPC: H04J3/06 ,  H04W56/00 ,  H04W76/14

    Abstract: According to various embodiments, an electronic device comprises a communication circuit, a processor, and a memory electrically connected to the processor, wherein the memory, when executed, can store commands for allowing the processor to: receive, from a first external electronic device, a first synchronization signal including first identification information through the communication circuit; synchronize the electronic device with the first external electronic device on the basis of at least a part of the information included in the first synchronization signal; receive, from a second external electronic device, a second synchronization signal including second identification information through the communication circuit; and control, on the basis of the second identification information and the first identification information, whether synchronization with second external electronic device occurs. Additional various embodiments are possible.

    MEMORY MODULE AND ON-DIE TERMINATION SETTING METHOD THEREOF
    13.
    发明申请
    MEMORY MODULE AND ON-DIE TERMINATION SETTING METHOD THEREOF 有权
    存储器模块及其内置终端设置方法

    公开(公告)号：US20130223123A1

    公开(公告)日：2013-08-29

    申请号：US13772895

    申请日：2013-02-21

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： Jaejun Lee ,  Bo-Ra Kim ,  Jeonghoon Baek

    IPC: G11C5/06

    CPC classification number: G11C5/06 ,  G11C7/1045 ,  G11C7/1057 ,  G11C7/1084

    Abstract: A memory system includes a plurality of memory devices on a printed circuit board, each of the memory devices including a plurality of external pads; a plurality of connection terminals formed on the printed circuit board, and electrically connected to respective ones of the external pads; and a plurality of signal lines formed on the printed circuit board to connect the connection terminals with the external pads, each of the signal lines between a corresponding connection terminal and a corresponding external pad and having a length. The plurality of memory devices are arranged at different distances from the plurality of connection terminals, and each signal line that connects a connection terminal to an external pad of a memory device either is connected to or does not connect a stub resistor depending on a length of the line.

    Abstract translation: 存储器系统包括在印刷电路板上的多个存储器件，每个存储器件包括多个外部焊盘; 形成在印刷电路板上的多个连接端子，并且电连接到相应的外部焊盘; 以及形成在印刷电路板上以将连接端子与外部焊盘连接的多条信号线，每条信号线在对应的连接端子和对应的外部焊盘之间并具有一定的长度。 多个存储器件布置在与多个连接端子不同的距离处，并且将连接端子与存储器件的外部焊盘连接的每个信号线都连接到或不连接短截止电阻器，这取决于长度 线。

    SEMICONDUCTOR PACKAGE AND METHOD OF MANUFACTURING THE SAME
    14.
    发明申请
    SEMICONDUCTOR PACKAGE AND METHOD OF MANUFACTURING THE SAME 有权

    公开(公告)号：US20240429192A1

    公开(公告)日：2024-12-26

    申请号：US18401625

    申请日：2023-12-31

    Applicant: SAMSUNG ELECTRONICS CO., LTD.

    Inventor： CHAJEA JO ,  Jaejun Lee ,  Hyiyeong Jang

    IPC: H01L23/00 ,  H01L25/00 ,  H01L25/10 ,  H01L25/18 ,  H10B80/00

    Abstract: A semiconductor package includes a lower semiconductor chip including a first circuit layer, an upper semiconductor chip disposed on the lower semiconductor chip and including a second circuit layer, and an interconnection layer disposed between the lower semiconductor chip and the upper semiconductor chip, the interconnection layer including a plurality of pads, including at least a first pad offset from the lower semiconductor chip or the upper semiconductor chip, and a wiring portion horizontally extended and connecting the first pad of the plurality of pads to a second pad of the plurality of pads disposed between the lower semiconductor chip and the upper semiconductor chip, wherein the wiring portion of the interconnection layer electrically connects the first circuit layer to the second circuit layer.

    SEMICONDUCTOR MEMORY DEVICE, MEMORY SYSTEM AND METHOD OF CONTROLLING THE SAME
    16.
    发明申请
    SEMICONDUCTOR MEMORY DEVICE, MEMORY SYSTEM AND METHOD OF CONTROLLING THE SAME 有权

    公开(公告)号：US20230083475A1

    公开(公告)日：2023-03-16

    申请号：US17720843

    申请日：2022-04-14

    Applicant: SAMSUNG ELECTRONICS CO., LTD.

    Inventor： Seonghoon JOO ,  Jaejun Lee ,  Ilhan Choi

    IPC: G11C7/04 ,  G06F1/20

    Abstract: A semiconductor memory device includes a plurality of input-output pins configured to communicate with a memory controller, a command control logic, a temperature measurement circuit and an operation limit controller. The command control logic controls an operation of the semiconductor memory device based on command signals and control signals transferred from the memory controller through control pins among the plurality of input-output pins. The temperature measurement circuit measures an operation temperature of the semiconductor memory device to generate a temperature code corresponding to the operation temperature. The operation limit controller, when it is determined based on the temperature code that the operation temperature exceeds a risk temperature, controls an internal operation of the semiconductor memory device regardless of the command signals and the control signals transferred from the memory controller to thereby decrease a power consumption of the semiconductor memory device.

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