公开(公告)号：US20240105417A1

公开(公告)日：2024-03-28

申请号：US18202155

申请日：2023-05-25

Applicant: Samsung Electronics Co., Ltd.

Inventor： Yeoseon Choi ,  Donghoon Kwon

IPC: H01J37/20 ,  H01J37/26

CPC classification number: H01J37/20 ,  H01J37/261 ,  H01J2237/2007

Abstract: A sample holder includes a head, a first holding plate extending in a first direction from one surface of the head and including at least one first sample hole configured to accommodate at least one first sample and a first main surface configured such that the at least one first sample accommodated in the at least one first sample hole is exposed at the first main surface, and a second holding plate extending in the first direction from the one surface of the head and including at least one second sample hole configured to accommodate at least one second sample and a second main surface configured such that the at least one second sample accommodated in the at least one second sample hole is exposed at the second main surface, wherein a direction perpendicular to the first main surface of the first holding plate differs from a direction perpendicular to the second main surface of the second holding plate.

公开(公告)号：US20240312902A1

公开(公告)日：2024-09-19

申请号：US18474345

申请日：2023-09-26

Applicant: Samsung Electronics Co., Ltd.

Inventor： Donghoon Kwon

IPC: H01L23/522 ,  H01L23/528 ,  H01L25/065 ,  H10B43/10 ,  H10B43/27 ,  H10B43/35 ,  H10B43/40 ,  H10B80/00

CPC classification number: H01L23/5226 ,  H01L23/5283 ,  H01L25/0652 ,  H10B43/10 ,  H10B43/27 ,  H10B43/35 ,  H10B43/40 ,  H10B80/00 ,  H01L2225/06506

Abstract: A three-dimensional semiconductor memory device comprises a first substrate including a cell array region and a contact region, a stack structure including interlayer dielectric layers and gate electrodes on the first substrate, a second dielectric layer on the stack structure, a cell contact plug that extends through the second dielectric layer and the contact region, a selection mold structure on the stack structure and the second dielectric layer, a third dielectric layer on the selection mold structure, and a capping through contact and a dummy through contact that extend through the selection mold structure and are connected to the cell contact plug. The dummy through contact has a second width. The capping through contact has a first width. The second width is different from the first width.

公开(公告)号：US20240298441A1

公开(公告)日：2024-09-05

申请号：US18476415

申请日：2023-09-28

Applicant: Samsung Electronics Co., Ltd.

Inventor： Hyo-Jung Kim ,  Donghoon Kwon

IPC: H10B41/41 ,  H01L23/522 ,  H01L23/528 ,  H01L25/065 ,  H10B41/10 ,  H10B41/27 ,  H10B41/35 ,  H10B43/10 ,  H10B43/27 ,  H10B43/35 ,  H10B43/40 ,  H10B80/00

CPC classification number: H10B41/41 ,  H01L23/5226 ,  H01L23/5283 ,  H01L25/0652 ,  H10B41/10 ,  H10B41/27 ,  H10B41/35 ,  H10B43/10 ,  H10B43/27 ,  H10B43/35 ,  H10B43/40 ,  H10B80/00 ,  H01L2225/06506

Abstract: A semiconductor device may include a peripheral circuit structure, a source structure on the peripheral circuit structure, a first capacitor electrode on the peripheral circuit structure, an electrode insulating layer that at least partially surrounds the first capacitor electrode, a gate stack on the source structure, a memory channel structure that extends through the gate stack, a staircase insulating layer on the gate stack and the electrode insulating layer, a second capacitor electrode on the first capacitor electrode and that extends through the staircase insulating layer, and a penetration via that extends through the staircase insulating layer and the electrode insulating layer.

公开(公告)号：US20240238936A1

公开(公告)日：2024-07-18

申请号：US18230528

申请日：2023-08-04

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Wonkeun CHO ,  Donghoon Kwon

IPC: B24B37/10 ,  B24B49/14 ,  B24B53/017 ,  B24B57/02 ,  H01L21/67

CPC classification number: B24B37/107 ,  B24B49/14 ,  B24B53/017 ,  B24B57/02 ,  H01L21/67051

Abstract: Provided is a chemical mechanical polishing apparatus including a head part configured to support a wafer, a buffer part on the head part and configured to support a center of the wafer, and a first polishing part that is spaced apart from the buffer part and configured to be on an edge of the wafer.

公开(公告)号：US20240217057A1

公开(公告)日：2024-07-04

申请号：US18347707

申请日：2023-07-06

Applicant: Samsung Electronics Co., Ltd.

Inventor： Donghoon Kwon ,  Chungki Min

IPC: B24B37/26

CPC classification number: B24B37/26

Abstract: The present disclosure relates to a chemical mechanical polishing apparatus and a method of replacing a polishing pad using the same. The chemical mechanical polishing apparatus includes: a polishing table; a polishing pad attachment feature on a surface of the polishing table; a polishing pad supply area outside the polishing table; and a polishing pad carrier configured to move a polishing pad from the polishing pad supply area to the polishing pad attachment feature, wherein the polishing pad attachment feature includes a magnetic feature and/or an adsorption feature to attach the polishing pad to the polishing table.

公开(公告)号：US20250024666A1

公开(公告)日：2025-01-16

申请号：US18740166

申请日：2024-06-11

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Yanghee Lee ,  Hyukmin Kim ,  Donghoon Kwon ,  Jonghyuk Park

IPC: H10B12/00

Abstract: A semiconductor memory device includes a substrate including a memory cell region in which active regions are defined, a peripheral region in which a logic active region is defined, and a boundary region including a region isolation trench between the memory cell region and the peripheral region, a boundary structure including a boundary isolation layer, a region isolation structure, and a region isolation filling layer sequentially disposed in the region isolation trench, and a word line extending across the active regions, wherein among the active regions, an active region located at an outermost part of the memory cell region and the region isolation structure are spaced apart from each other by a first width, and the word line extends by an extension length less than the first width from an edge of the active region located at the outermost part of the memory cell region towards the region isolation structure.

公开(公告)号：US12089407B2

公开(公告)日：2024-09-10

申请号：US17574740

申请日：2022-01-13

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Donghoon Kwon ,  Chungki Min

IPC: H10B43/27 ,  H01L23/535 ,  H10B41/27 ,  H10B41/41 ,  H10B43/40

CPC classification number: H10B43/27 ,  H01L23/535 ,  H10B41/27 ,  H10B41/41 ,  H10B43/40

Abstract: A semiconductor device includes a peripheral circuit structure including a lower substrate, a plurality of circuits formed on the lower substrate, and a plurality of wiring layers connected to the plurality of circuits, an upper substrate covering the peripheral circuit structure and including a through opening, a memory stack structure including a plurality of gate lines, a memory cell contact passing through at least one of the plurality of gate lines to contact one gate line from among the plurality of gate lines, the memory cell contact extending to the peripheral circuit structure through the through opening and being configured to be electrically connected to a first wiring layer from among the plurality of wiring layers, and a plurality of dummy channel structures passing through at least one of the plurality of gate lines to extend to the peripheral circuit structure through the through opening.

公开(公告)号：US20240238939A1

公开(公告)日：2024-07-18

申请号：US18515780

申请日：2023-11-21

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Jihyeon Kim ,  Donghoon Kwon

IPC: B24B57/02 ,  B08B3/02 ,  B24B37/015

CPC classification number: B24B57/02 ,  B08B3/02 ,  B24B37/015

Abstract: A substrate polishing apparatus includes a platen having an upper surface configured to polish a semiconductor substrate, a slurry supply configured to supply slurry between the semiconductor substrate and the platen, a substrate holder configured to hold the semiconductor substrate and to bring the semiconductor substrate in contact with the upper surface of the platen, the substrate holder having a circular shape, a temperature controller configured to control temperature of the platen through thermal transfer via direct contact, wherein the temperature controller has a thermal conductive body that has an arc shape and the thermal conductive body is spaced apart from the substrate holder and surrounds at least a portion of the substrate holder, and a cleaning component configured to supply a cleaning solution to the substrate holder and the temperature controller.

公开(公告)号：US20240238935A1

公开(公告)日：2024-07-18

申请号：US18396918

申请日：2023-12-27

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Gihwan Kim ,  Donghoon Kwon ,  Kihoon Jang

IPC: B24B37/015

CPC classification number: B24B37/015

Abstract: A chemical mechanical polishing apparatus, may include: a turntable; a CMP pad installed on an upper surface of the turntable; a polishing head disposed above the turntable and contacting a wafer with the CMP pad to press the wafer; a slurry supply unit supplying slurry to the CMP pad; and a temperature control unit disposed between the slurry supply unit and the polishing head, wherein the temperature control unit may be provided with a body disposed above the CMP pad; and heating members disposed on a bottom surface of the body to heat the CMP pad, wherein the body may be provided with a suction port disposed between the heating members to suction steam.

公开(公告)号：US20240173820A1

公开(公告)日：2024-05-30

申请号：US18214857

申请日：2023-06-27

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Yeonsu Go ,  Donghoon Kwon

IPC: B24B53/12 ,  B24B1/04 ,  B24B53/017

CPC classification number: B24B53/12 ,  B24B1/04 ,  B24B53/017

Abstract: Provided is a conditioner including a conditioning arm on a polishing pad that is configured to chemically mechanically polish a substrate based on slurry, a conditioning disk on the conditioning arm that is configured to condition the polishing pad, a dilution solution injector on a first side of the conditioning arm and configured to inject a dilution solution to the slurry introduced into a space under the conditioning disk, and a sonicator on a second side of the conditioning arm and configured to apply an ultrasonic wave to debris generated from the polishing pad.