Abstract:
A gate driver includes multiple stages. Each stage has a circuit portion and a wiring portion. The wiring portion delivers first and second clock signals to the circuit portion. Further, the wiring portion includes first and second clock wirings receiving the first and second clock signal, respectively, first connecting wirings electrically connecting the first clock wiring with a first every other stage, and second connecting wirings electrically connecting the second clock wiring with the odd-numbered stages. Further, the wiring portion includes third connecting wirings electrically connecting the first connecting wiring with a second every other stage and fourth connecting wirings electrically connecting the second connecting wiring with the even-numbered stages. This configuration may prevent the gate driver from operating erroneously and reduce power consumed by the gate driver.
Abstract:
A display device according to an embodiment of the present invention includes: a pixel including a first subpixel and a second subpixel; a first signal line connected to the first subpixel and transmitting a first signal; a second signal line connected to the second subpixel and transmitting a second signal; a third signal line intersecting the first and the second signal lines, connected to at least one of the first and the second subpixels, and transmitting a third signal; and a fourth signal line intersecting the first and the second signal lines and transmitting a fourth signal, wherein the first subpixel and the second subpixel are supplied with data voltages having different magnitude, and the data voltages applied to the first and the second subpixels are originated from a single image information.
Abstract:
A display panel includes an amorphous silicon gate driver in which a lower voltage than the gate-off voltage output from the gate driver is applied to an adjacent stage as a low voltage transmission signal.
Abstract:
A display panel includes an amorphous silicon gate driver in which a lower voltage than the gate-off voltage output from the gate driver is applied to an adjacent stage as a low voltage transmission signal.
Abstract:
A display apparatus includes a display panel which displays an image, a compensation area determiner which divides a display area of the display panel into a compensation area and a normal area, a compensation coefficient determiner which determines a compensation coefficient corresponding to input data of the compensation area, a compensation look up table which stores a noise compensation data which compensates a luminance difference of the compensation area by an interference noise of a light-source driving signal, and a correction data calculator which calculates a correction data corresponding to the input data of the compensation area using the compensation coefficient and the noise compensation data.
Abstract:
A display device includes a pixel matrix having pixel rows and pixel columns and including pixels having switching elements positioned alternately at a corner near an upper and a lower side of each pixel row and positioned alternately at a corner near an upper and a lower side of and alternately at a corner near a left and a right side of each pixel column; multiple pairs of gate lines transmitting a gate-on voltage; and multiple data lines transmitting data voltages, wherein each pair of gate lines are disposed at the upper and lower sides of each pixel row with the pixels in each row connected to the gate line positioned nearest the respective switching element, and each data line is disposed between adjacent pairs of pixel columns and connected to pairs of pixels where one pixel of the pair has a switching element positioned nearest the respective data line.
Abstract:
A display panel includes an amorphous silicon gate driver in which a lower voltage than the gate-off voltage output from the gate driver is applied to an adjacent stage as a low voltage transmission signal.
Abstract:
A display device includes a pixel matrix having pixel rows and pixel columns and including pixels having switching elements positioned alternately at a corner near an upper and a lower side of each pixel row and positioned alternately at a corner near an upper and a lower side of and alternately at a corner near a left and a right side of each pixel column; multiple pairs of gate lines transmitting a gate-on voltage; and multiple data lines transmitting data voltages, wherein each pair of gate lines are disposed at the upper and lower sides of each pixel row with the pixels in each row connected to the gate line positioned nearest the respective switching element, and each data line is disposed between adjacent pairs of pixel columns and connected to pairs of pixels where one pixel of the pair has a switching element positioned nearest the respective data line.
Abstract:
A display device includes a pixel matrix having pixel rows and pixel columns and including pixels having switching elements positioned alternately at a corner near an upper and a lower side of each pixel row and positioned alternately at a corner near an upper and a lower side of and alternately at a corner near a left and a right side of each pixel column; multiple pairs of gate lines transmitting a gate-on voltage; and multiple data lines transmitting data voltages, wherein each pair of gate lines are disposed at the upper and lower sides of each pixel row with the pixels in each row connected to the gate line positioned nearest the respective switching element, and each data line is disposed between adjacent pairs of pixel columns and connected to pairs of pixels where one pixel of the pair has a switching element positioned nearest the respective data line.
Abstract:
A display panel driving apparatus includes an image pattern analyzing part, a clock signal generating part and a data driving part. The image pattern analyzing part is configured to analyze an image pattern of an image data. The clock signal generating part is configured to generating a clock signal having a different pulse width according to the image pattern of an image data. The data driving part is configured to drive a data line of a display panel in response to the clock signal. Thus, power consumption and heating of the data driving part may be decreased.