公开(公告)号：US10074334B2

公开(公告)日：2018-09-11

申请号：US15601026

申请日：2017-05-22

Applicant: Samsung Display Co., Ltd.

Inventor： Haeng-Won Park ,  Seung-Hwan Moon ,  Nam-Soo Kang ,  Sung-Jae Moon ,  Sung-Man Kim ,  Seong-Young Lee ,  Yong-Soon Lee

IPC: G09G3/36 ,  G11C19/18

CPC classification number: G09G3/3677 ,  G09G2300/0426 ,  G11C19/184

Abstract: A gate driver includes multiple stages. Each stage has a circuit portion and a wiring portion. The wiring portion delivers first and second clock signals to the circuit portion. Further, the wiring portion includes first and second clock wirings receiving the first and second clock signal, respectively, first connecting wirings electrically connecting the first clock wiring with a first every other stage, and second connecting wirings electrically connecting the second clock wiring with the odd-numbered stages. Further, the wiring portion includes third connecting wirings electrically connecting the first connecting wiring with a second every other stage and fourth connecting wirings electrically connecting the second connecting wiring with the even-numbered stages. This configuration may prevent the gate driver from operating erroneously and reduce power consumed by the gate driver.

公开(公告)号：US09865217B2

公开(公告)日：2018-01-09

申请号：US14671865

申请日：2015-03-27

Applicant: Samsung Display Co., LTD.

Inventor： Myung-Ho Won ,  Dal-Jung Kwon ,  Haeng-Won Park ,  Hyeon-Seok Bae ,  Seung-Hoon Jung ,  Ho-Sup Choi

IPC: G09G3/36

CPC classification number: G09G3/3685 ,  G09G3/3681 ,  G09G2310/0218 ,  G09G2310/0291 ,  G09G2320/0223

Abstract: A method of driving a display panel includes generating a reference gate signal delayed by a predetermined period from a gate signal applied to a gate line disposed in a first end area of the display panel, the first end area being an area in which a RC delay of a data line is the smallest, receiving an input gate signal applied to a gate line disposed in a second area of the display panel, the second area being an area in which the RC delay of the data line is the largest; and selectively controlling a delay time of each of the plurality of gate signals applied to each of the plurality of gate lines according to a result of comparison between the reference gate signal and the input gate signal.

公开(公告)号：US10025149B2

公开(公告)日：2018-07-17

申请号：US15877078

申请日：2018-01-22

Applicant: SAMSUNG DISPLAY CO., LTD

Inventor： Dong-Gyu Kim ,  Seung-Hwan Moon ,  Yong-Soon Lee ,  Nam-Soo Kang ,  Haeng-Won Park

IPC: H01L27/14 ,  H01L29/04 ,  H01L29/15 ,  H01L31/036 ,  G02F1/1345 ,  H01L27/12 ,  G02F1/1339 ,  H01L29/786 ,  G02F1/1362

CPC classification number: G02F1/13454 ,  G02F1/1339 ,  G02F1/1345 ,  G02F1/136286 ,  G02F2001/13629 ,  H01L27/1222 ,  H01L27/124 ,  H01L27/1255 ,  H01L29/78669 ,  H01L29/78678

Abstract: Gate-driving circuitry of a thin film transistor array panel is formed on the same plane as a display area of the transistor array panel. The gate-driving circuitry includes driving circuitry and signal lines having apertures. Thus, a sufficient amount of light, even though illuminated from the thin film transistor array panel side, can reach a photosetting sealant overlapping at least in part the gate-driving circuitry. The thin film transistor array panel and the counter panel are put together air-tight and moisture-tight. Consequently, the gate-driving circuitry can avoid corrosion by moisture introduced from outside. Gate-driving circuitry malfunctions can also be reduced.

公开(公告)号：US09874794B2

公开(公告)日：2018-01-23

申请号：US15095473

申请日：2016-04-11

Applicant: SAMSUNG DISPLAY CO., LTD

Inventor： Dong-Gyu Kim ,  Seung-Hwan Moon ,  Yong-Soon Lee ,  Nam-Soo Kang ,  Haeng-Won Park

IPC: H01L27/14 ,  H01L29/04 ,  H01L29/15 ,  H01L31/036 ,  G02F1/1345 ,  G02F1/1339 ,  G02F1/1362 ,  H01L27/12 ,  H01L29/786

CPC classification number: G02F1/13454 ,  G02F1/1339 ,  G02F1/1345 ,  G02F1/136286 ,  G02F2001/13629 ,  H01L27/1222 ,  H01L27/124 ,  H01L27/1255 ,  H01L29/78669 ,  H01L29/78678

Abstract: Gate-driving circuitry of a thin film transistor array panel is formed on the same plane as a display area of the transistor array panel. The gate-driving circuitry includes driving circuitry and signal lines having apertures. Thus, a sufficient amount of light, even though illuminated from the thin film transistor array panel side, can reach a photosetting sealant overlapping at least in part the gate-driving circuitry. The thin film transistor array panel and the counter panel are put together air-tight and moisture-tight. Consequently, the gate-driving circuitry can avoid corrosion by moisture introduced from outside. Gate-driving circuitry malfunctions can also be reduced.