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公开(公告)号：US10921652B2
公开(公告)日：2021-02-16
申请号：US16252941
申请日：2019-01-21
Applicant: Samsung Display Co., Ltd.
Inventor： Doyeong Park , Byoungsun Na , Yoomi Ra , Kyusu Ahn , Richard James , Kookhyun Choi
IPC: G02F1/1339 , G02F1/1343 , G02F1/1337 , G02F1/1362 , G02F1/1345 , G02F1/1368 , G02F1/1333 , G02F1/1335
Abstract: A display apparatus includes a first base substrate (BS), a second BS facing the first BS, a liquid crystal layer disposed between the first BS and the second BS, a color filter layer, pixel electrodes, a light-shielding column spacer, a common electrode, and trap electrodes. The first BS includes a display area and a non-display area. The color filter layer is disposed on the first BS in the display area. The pixel electrodes are disposed on the color filter layer. The light-shielding column spacer is disposed on the first BS in the non-display area and includes a light-shielding material. The common electrode is disposed on the second BS and faces the pixel electrodes. The liquid crystal layer is disposed between the common electrode and the pixel electrodes. The trap electrodes are disposed on a lower portion of the light-shielding column spacer and face the common electrode.
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公开(公告)号：US10359676B2
公开(公告)日：2019-07-23
申请号：US15990246
申请日：2018-05-25
Applicant: SAMSUNG DISPLAY CO., LTD.
Inventor： Hwanyoung Jang , Kyunghoe Lee , Seongyoung Lee , Byoungsun Na , Seonkyoon Mok , Hyungjun Park
IPC: H01L29/786 , G02F1/1362 , G02F1/1368 , G02F1/1343
Abstract: A display device including a substrate, a gate line, a data line, a plurality of thin film transistors, a first pixel electrode, and a second pixel electrode. The gate line is disposed on the substrate. The data line is disposed on the substrate. The data line includes a first branch line and a second branch line. The first branch line and the second branch line form a closed loop. The plurality of thin film transistors is connected to the data line. The first pixel electrode is connected to at least one of the plurality of thin film transistors. The second pixel electrode is connected to at least another one of the plurality of thin film transistors. The first pixel electrode and the second pixel electrode are arranged in a substantially diagonal direction with respect to each another. The first branch line is connected to a source electrode of said at least one of the plurality of thin film transistors. The second branch line is connected to a source electrode of said at least another one of the plurality of thin film transistors.
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公开(公告)号：US10127876B2
公开(公告)日：2018-11-13
申请号：US15159721
申请日：2016-05-19
Applicant: SAMSUNG DISPLAY CO., LTD.
Inventor： Kye-uk Lee , Kee-bum Park , Sihyun Ahn , Jaewon Kim , Byoungsun Na , Yoomi Ra
Abstract: A gate driving circuit includes a plurality of stages, a k-th stage (where k is a natural number) of the plurality of stages being configured to receive a clock signal, a (k−1)-th carry signal from a (k−1)-th stage of the plurality of stages, a (k+1)-th carry signal from a (k+1)-th stage of the plurality of stages, a (k+2)-th carry signal from a (k+2)-th stage of the plurality of stages, a first ground voltage, a second ground voltage, and a third ground voltage, and to output a k-th gate signal and a k-th carry signal, the k-th stage including a first pull down circuit configured to discharge the k-th gate signal as the third ground voltage in response to the (k+1)-th carry signal, and the third ground voltage having a lower voltage level than the first ground voltage and having a higher voltage level than the second ground voltage.
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公开(公告)号：US09921448B2
公开(公告)日：2018-03-20
申请号：US15425034
申请日：2017-02-06
Applicant: Samsung Display Co., Ltd.
Inventor： Seonkyoon Mok , Seongyoung Lee , Kiwon Park , Hyungjun Park , Hwanyoung Jang , Byoungsun Na
IPC: H01L27/12 , G02F1/1362 , G02F1/1343 , G02F1/1368 , G02F1/1335 , G02F1/1333
CPC classification number: G02F1/136286 , G02F1/133345 , G02F1/133512 , G02F1/133514 , G02F1/133528 , G02F1/134309 , G02F1/13439 , G02F1/136213 , G02F1/136227 , G02F1/1368 , G02F2001/13606 , G02F2201/121 , G02F2201/123 , H01L27/124 , H01L27/1255
Abstract: A display device capable of significantly reducing variation of a capacitance formed by a pixel electrode and a data line, the display device including: a first gate line; first and second data lines intersecting the first gate line; a pixel electrode adjacent to the second data line; a switching element connected to the first gate line, the first data line, and the pixel electrode; and a first extension portion extending from the pixel electrode and intersecting the second data line.
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公开(公告)号：US20170084239A1
公开(公告)日：2017-03-23
申请号：US15159721
申请日：2016-05-19
Applicant: SAMSUNG DISPLAY CO., LTD.
Inventor： Kye-uk Lee , Kee-bum Park , Sihyun Ahn , Jaewon Kim , Byoungsun Na , Yoomi Ra
CPC classification number: G09G3/3677 , G09G3/2003 , G09G3/3648 , G09G3/3688 , G09G2230/00 , G09G2310/0286 , G09G2320/02 , G11C19/28
Abstract: A gate driving circuit includes a plurality of stages, a k-th stage (where k is a natural number) of the plurality of stages being configured to receive a clock signal, a (k−1)-th carry signal from a (k−1)-th stage of the plurality of stages, a (k+1)-th carry signal from a (k+1)-th stage of the plurality of stages, a (k+2)-th carry signal from a (k+2)-th stage of the plurality of stages, a first ground voltage, a second ground voltage, and a third ground voltage, and to output a k-th gate signal and a k-th carry signal, the k-th stage including a first pull down circuit configured to discharge the k-th gate signal as the third ground voltage in response to the (k+1)-th carry signal, and the third ground voltage having a lower voltage level than the first ground voltage and having a higher voltage level than the second ground voltage.
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Patent Agency Ranking
公开(公告)号：US11187946B2
公开(公告)日：2021-11-30
申请号：US16236819
申请日：2018-12-31
Applicant: SAMSUNG DISPLAY CO., LTD.
Inventor： Changsoo Lee , Byoungsun Na
IPC: H05K1/14 , G02F1/1345 , G02F1/1362
Abstract: A display device includes: a display substrate including an upper surface, a lower surface facing the upper surface, and a side surface connected to the upper surface and the lower surface; a plurality of drivers disposed on the side surface of the display substrate; and a connection wiring film attached to the side surface of the display substrate, and electrically connecting the drivers.
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公开(公告)号：US10732474B2
公开(公告)日：2020-08-04
申请号：US16266678
申请日：2019-02-04
Applicant: Samsung Display Co., Ltd.
Inventor： Sehyun Lee , Haksun Chang , Byoungsun Na , Seungmin Lee , Jaeho Choi
IPC: H01L27/14 , G02F1/1362 , G02F1/1368 , G02F1/1343 , H01L27/12
Abstract: A display apparatus includes a pixel connected to a data line. The pixel includes a first pixel electrode and a second pixel electrode spaced apart from the first pixel electrode in an extension direction of the data line. The second pixel electrode includes first to fourth stem portions. The third and fourth stem portions are further from the first pixel electrode than the first and second stem portions in the extension direction. The first and second stem portions are connected to one another to form a “V”-shaped structure. The third and fourth stem portions are connected to one another to form an inverted “V”-shaped structure.
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公开(公告)号：US10720090B2
公开(公告)日：2020-07-21
申请号：US16231657
申请日：2018-12-24
Applicant: SAMSUNG DISPLAY CO., LTD.
Inventor： Chang-Soo Lee , Byoungsun Na
Abstract: A display apparatus includes a display panel including a display area and a non-display area, in which an image is displayed in the display area and a peripheral area is disposed adjacent to the display area in the non-display area. The display panel includes a plurality of gate lines extending in a first direction, a plurality of data lines extending a second direction which crosses the first direction, and a plurality of unit pixels which are electrically connected to each of the gate lines and the data lines. A gate driver generates a clock signal, and a gate signal generator receives the clock signal and outputs a generated gate signal to the gate line. A clock line transmits the clock signal to the gate signal generator, and a flexible film disposed adjacent to the gate signal generator in the first direction is connected to the display panel in the peripheral area. At least a portion of the clock line is formed on the flexible film.
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公开(公告)号：US20190227365A1
公开(公告)日：2019-07-25
申请号：US16252941
申请日：2019-01-21
Applicant: Samsung Display Co., Ltd.
Inventor： Doyeong Park , Byoungsun Na , Yoomi Ra , Kyusu Ahn , Richard James , Kookhyun Choi
IPC: G02F1/1339 , G02F1/1335 , G02F1/1343 , G02F1/1337 , G02F1/1362 , G02F1/1345 , G02F1/1368 , G02F1/1333
Abstract: A display apparatus includes a first base substrate (BS), a second BS facing the first BS, a liquid crystal layer disposed between the first BS and the second BS, a color filter layer, pixel electrodes, a light-shielding column spacer, a common electrode, and trap electrodes. The first BS includes a display area and a non-display area. The color filter layer is disposed on the first BS in the display area. The pixel electrodes are disposed on the color filter layer. The light-shielding column spacer is disposed on the first BS in the non-display area and includes a light-shielding material. The common electrode is disposed on the second BS and faces the pixel electrodes. The liquid crystal layer is disposed between the common electrode and the pixel electrodes. The trap electrodes are disposed on a lower portion of the light-shielding column spacer and face the common electrode.
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公开(公告)号：US09995982B2
公开(公告)日：2018-06-12
申请号：US15472796
申请日：2017-03-29
Applicant: SAMSUNG DISPLAY CO., LTD.
Inventor： Hwanyoung Jang , Kyunghoe Lee , Seongyoung Lee , Byoungsun Na , Seonkyoon Mok , Hyungjun Park
IPC: H01L29/04 , G02F1/1362 , G02F1/1368 , G02F1/1343 , H01L29/786
CPC classification number: G02F1/136286 , G02F1/134309 , G02F1/13624 , G02F1/1368 , G02F2001/134345 , G02F2001/134372 , G02F2201/123 , H01L29/78633
Abstract: A display device including a substrate, a gate line, a data line, a plurality of thin film transistors, a first pixel electrode, and a second pixel electrode. The gate line is disposed on the substrate. The data line is disposed on the substrate. The data line includes a first branch line and a second branch line. The first branch line and the second branch line form a closed loop. The plurality of thin film transistors is connected to the data line. The first pixel electrode is connected to at least one of the plurality of thin film transistors. The second pixel electrode is connected to at least another one of the plurality of thin film transisters. The first pixel electrode and the second pixel electrode are arranged in a substantially diagonal direction with respect to each another. The first branch line is connected to a source electrode of said at least one of the plurality of thin film transistors. The second branch line is connected to a source electrode of said at least another one of the plurality of thin film transistors.
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