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公开(公告)号:US10510980B2
公开(公告)日:2019-12-17
申请号:US14983460
申请日:2015-12-29
Applicant: Samsung Display Co., Ltd.
Inventor: Taehoon Yang , Jaewan Jung , Kiyong Lee , Sangwol Lee
Abstract: A display module includes a window member including a display area and a bezel area, a display panel including a display part corresponding to the display area, and an edge part corresponding to the bezel area and bent from the display part to extend away from the window member, and a protective frame accommodating the display panel and coupled to the window member.
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公开(公告)号:US20190296095A1
公开(公告)日:2019-09-26
申请号:US16437857
申请日:2019-06-11
Applicant: SAMSUNG DISPLAY CO., LTD.
Inventor: Jongchan Lee , Taehoon Yang , Woonghee Jeong , Kyoungwon Lee , Yongsu Lee
Abstract: A display device includes at least one transistor. The transistor has an active pattern including a first active area and a second active area. The first active area includes a first channel area and an n-doped area contacting the first channel area. The second active area includes a second channel area and a p-doped area contacting the second channel area. A first insulation layer covers at least a portion of the active pattern. A first gate electrode is disposed on the first insulation layer and at least partially overlaps the first channel area. A second gate electrode is disposed on the first insulation layer and at least partially overlaps the second channel area. A taper angle of the second gate electrode is larger than a taper angle of the first gate electrode.
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公开(公告)号:US10403649B2
公开(公告)日:2019-09-03
申请号:US15869748
申请日:2018-01-12
Applicant: SAMSUNG DISPLAY CO., LTD.
Inventor: Woonghee Jeong , Taehoon Yang , Kyoungwon Lee , Jongchan Lee , Yongsu Lee
Abstract: A display device includes a common active pattern, a first gate electrode, and a second gate electrode. The common active pattern includes an NMOS area, a PMOS area, and a silicide area in a same layer as the NMOS area and the PMOS area. The silicide area electrically connects the NMOS area to the PMOS area. The NMOS area includes a first channel area and an n-doped area contacting the first channel area. The PMOS area includes a second channel area and a p-doped area contacting the second channel area. The first gate electrode overlaps the first channel area, and the second gate electrode overlaps the second channel area.
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公开(公告)号:US12238971B2
公开(公告)日:2025-02-25
申请号:US18528652
申请日:2023-12-04
Applicant: Samsung Display Co., Ltd.
Inventor: Juwon Yoon , Taehoon Yang
IPC: H01L27/14 , H10K59/121
Abstract: A display apparatus includes a substrate including a display area in which a display element is arranged, a first thin-film transistor arranged in the display area and including a first semiconductor layer and a first gate electrode insulated from the first semiconductor layer, the first semiconductor layer including a silicon semiconductor, a first interlayer insulating layer covering the first gate electrode, a second thin-film transistor on the first interlayer insulating layer and including a second semiconductor layer and a second gate electrode insulated from the second semiconductor layer, the second semiconductor layer including an oxide semiconductor, and an upper electrode arranged on the first interlayer insulating layer and including a same material as that of the second semiconductor layer and at least overlapping the first gate electrode.
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公开(公告)号:US12108644B2
公开(公告)日:2024-10-01
申请号:US18321718
申请日:2023-05-22
Applicant: SAMSUNG DISPLAY CO., LTD.
Inventor: Sunyoung Jung , Gunhee Kim , Hyunho Kim , Donghwan Shim , Taehoon Yang , Sanghee Jang , Chungsock Choi
IPC: H10K59/131 , G09G3/3225
CPC classification number: H10K59/131 , G09G3/3225
Abstract: A display panel includes: a display area including a main display area, and a component area; a peripheral area; a plurality of main pixel circuits at the main display area; a plurality of main gate lines extending in a first direction, and connected to the main pixel circuits; a plurality of main data lines extending in a second direction, and connected to the main pixel circuits; a plurality of auxiliary display elements at the component area; a plurality of auxiliary pixel circuits at the periphery area, and connected to the auxiliary display elements; a plurality of auxiliary gate lines connected to the auxiliary pixel circuits, and to main gate lines that are adjacent to the component area in the first direction; and a plurality of auxiliary data lines connected to the auxiliary pixel circuits, and to main data lines that are adjacent to the component area in the second direction.
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公开(公告)号:US20240324313A1
公开(公告)日:2024-09-26
申请号:US18605818
申请日:2024-03-15
Applicant: Samsung Display Co., Ltd.
Inventor: Hyunho Kim , Hyoengki Kim , Taehoon Yang
IPC: H10K59/122 , H10K59/80
CPC classification number: H10K59/122 , H10K59/80515 , H10K59/8792
Abstract: A display apparatus includes a pixel circuit layer including at least one thin-film transistor, a planarization layer located on the at least one thin-film transistor, and a first bank layer located on the planarization layer and defining a first opening, a display element including a pixel electrode located to correspond to the first opening, a counter electrode, and an emission layer located between the pixel electrode and the counter electrode, a second bank layer located between the pixel electrode and the counter electrode defining a pixel opening, and a light-blocking layer located on the display element and defining a second opening, wherein the pixel electrode includes an inclined surface located on a side surface of the first bank layer and a flat surface located on a top surface of the planarization layer exposed through the first opening, wherein the inclined surface of the pixel electrode is inclined by 15° to 25°.
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公开(公告)号:US12035585B2
公开(公告)日:2024-07-09
申请号:US17298616
申请日:2019-05-08
Applicant: Samsung Display Co., Ltd.
Inventor: Juwon Yoon , Sanghee Jang , Kibum Kim , Taehoon Yang , Jeonghyun Lee , Jongchan Lee , Pilsuk Lee , Woonghee Jeong
IPC: H10K59/131
CPC classification number: H10K59/131
Abstract: An embodiment of the present disclosure comprises a display device including a substrate including a display area and a peripheral area around the display area, a thin-film transistor on the substrate in the display area and a display element electrically connected to the thin-film transistor, and a first voltage line and a second voltage line located on the substrate in the peripheral area and supplying power for driving the display element, wherein the first voltage line is a common voltage line and entirely surrounds the display area, the second voltage line is a driving voltage line and is arranged to correspond to one side of the display area, and the first voltage line and the second voltage line are on different layers.
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公开(公告)号:US11903242B2
公开(公告)日:2024-02-13
申请号:US18059776
申请日:2022-11-29
Applicant: SAMSUNG DISPLAY CO., LTD.
Inventor: Sunhee Lee , Sunho Kim , Gunhee Kim , Donghwan Shim , Taehoon Yang
IPC: H10K50/84 , H10K59/12 , H10K59/13 , H10K59/35 , H10K50/844 , H10K59/124 , H10K59/131 , H10K77/10 , H01L27/146 , G02F1/1333 , G09F9/30 , G06F1/16
CPC classification number: H10K50/8445 , H10K59/124 , H10K59/131 , H10K77/111 , G02F1/133305 , G06F1/1652 , G09F9/301 , G09G2300/0408 , G09G2300/0804 , G09G2380/02 , H01L27/14678 , H10K59/35 , H10K59/351
Abstract: A display apparatus includes: a substrate including a display area and a peripheral area around the display area, the substrate having a bent portion; a plurality of display elements in the display area; and a thin film encapsulation layer over the plurality of display elements and including a first encapsulation layer, a second encapsulation layer over the first encapsulation layer, and an organic encapsulation layer between the first encapsulation layer and the second encapsulation layer, wherein the second encapsulation layer includes a plurality of inorganic thin layers and a plurality of organic thin layers alternately arranged, and a thickness of the second encapsulation layer is equal to or less than a thickness of the first encapsulation layer.
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公开(公告)号:US11877477B2
公开(公告)日:2024-01-16
申请号:US17358087
申请日:2021-06-25
Applicant: Samsung Display Co., Ltd.
Inventor: Sunho Kim , Juchan Park , Sunhee Lee , Gunhee Kim , Taehoon Yang
IPC: H10K59/122 , H10K59/126 , H10K59/35 , H10K59/121
CPC classification number: H10K59/122 , H10K59/126 , H10K59/1213 , H10K59/353
Abstract: Provided is an organic light-emitting display apparatus in which a dead space may be reduced. The organic light-emitting display apparatus includes: a substrate including a first display area, a second display area disposed outside of the first display area, and a third display area disposed outside of the second display area; a first thin-film transistor disposed in the first display area on the substrate; a second thin-film transistor and a third thin-film transistor each arranged in the second display area on the substrate; a first pixel electrode arranged in the first display area on the substrate and electrically connected to the first thin-film transistor; a second pixel electrode arranged in the second display area on the substrate and electrically connected to the second thin-film transistor; and a third pixel electrode arranged in the third display area on the substrate and electrically connected to the third thin-film transistor.
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公开(公告)号:US11690244B2
公开(公告)日:2023-06-27
申请号:US16856716
申请日:2020-04-23
Applicant: SAMSUNG DISPLAY CO., LTD.
Inventor: Seungchang Lee , Gunhee Kim , Donghyun Kim , Sanghoon Kim , Soohyun Moon , Joohee Jeon , Sungjin Hong , Taehoon Yang
IPC: H10K50/844 , H10K71/00 , H10K50/842 , H01L51/52 , H01L51/56
CPC classification number: H01L51/5253 , H01L51/5246 , H01L51/56
Abstract: A display device is provided. The display device includes a substrate including a display area, an opening area disposed in the display area, a first non-display area at least partially surrounding the display area, and a second non-display area at least partially surrounding the opening area. A display layer is disposed in the display area. An encapsulating substrate covers the display layer and has an opening corresponding to the opening area. A sealing portion is disposed between the encapsulating substrate and the substrate. The sealing portion is disposed in the opening area and connects the encapsulating substrate to the substrate. A partition wall is disposed between the substrate and the sealing portion.
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