公开(公告)号：US20210193698A1

公开(公告)日：2021-06-24

申请号：US16940561

申请日：2020-07-28

Applicant: SAMSUNG DISPLAY CO., LTD.

Inventor： Hyanga Park ,  Kibum Kim ,  Myeonghun Song ,  Jongchan Lee ,  Sanghee Jang ,  Woonghee Jeong

IPC: H01L27/12 ,  H01L27/32

Abstract: A display apparatus includes a substrate including a display area and a non-display area disposed around the display area, a driving circuit disposed in the non-display area, a first conductive line extending in a first direction and disposed in the non-display area, a second conductive line extending in the first direction and disposed on the first conductive line, and a third conductive line extending in the first direction and disposed on the second conductive line, wherein the second conductive line overlaps the first conductive line by a first width or is spaced apart from the first conductive line by a first distance in a plan view, and the third conductive line overlaps the first conductive line by a second width or is spaced apart from the first conductive line by a second distance in the plan view.

公开(公告)号：US10984721B2

公开(公告)日：2021-04-20

申请号：US16656873

申请日：2019-10-18

Applicant: Samsung Display Co., Ltd.

Inventor： Taehoon Yang ,  Jongchan Lee ,  Woonghee Jeong

IPC: G09G5/10 ,  G09G3/3258 ,  H01L27/32 ,  G09G3/3233

Abstract: A pixel, wherein: gates of second and fifth transistors receive a first gate signal; gates of third and fourth transistors respectively receive second and third gate signals; first terminals (FTs) of the second to fifth transistors respectively receive a data voltage, reference voltage, initialization voltage, and first power supply voltage (PSV); a second electrode of a second capacitor receives the first PSV; a second terminal (ST) of a light emitting element (LEE) receives a second PSV; a gate of a first transistor, STs of the second and third transistors, and a first electrode of a first capacitor are connected to a first node; STs of the first and fourth transistors, a FT of the LEE, and second and first electrodes respectively of the first and second capacitors are connected to a second node; and a ST of the fifth transistor is connected to a FT of the first transistor.

公开(公告)号：US10593770B2

公开(公告)日：2020-03-17

申请号：US15870095

申请日：2018-01-12

Applicant: SAMSUNG DISPLAY CO., LTD.

Inventor： Jongchan Lee ,  Taehoon Yang ,  Woonghee Jeong ,  Kyoungwon Lee ,  Yongsu Lee

IPC: H01L21/44 ,  H01L21/02 ,  H01L29/417 ,  H01L29/66 ,  H01L27/12 ,  H01L29/786

Abstract: A display device includes a first insulation layer on a first gate electrode, an active pattern on the first insulation layer and including an NMOS area and a PMOS area, the PMOS area overlapping the first gate electrode, a second insulation layer on the active pattern. The active pattern includes an NMOS area and a PMOS area, with the PMOS area overlapping the first gate electrode. In addition, a second gate electrode is on the second insulation layer and overlaps the NMOS area. An active-protecting pattern is in the same layer as the second gate electrode and passes through the second insulation layer to contact the PMOS area. A third insulation layer is on the active-protecting pattern and the second gate electrode. A data metal electrode passes through the third insulation layer and contacts the active-protecting pattern.

公开(公告)号：US12035585B2

公开(公告)日：2024-07-09

申请号：US17298616

申请日：2019-05-08

Applicant: Samsung Display Co., Ltd.

Inventor： Juwon Yoon ,  Sanghee Jang ,  Kibum Kim ,  Taehoon Yang ,  Jeonghyun Lee ,  Jongchan Lee ,  Pilsuk Lee ,  Woonghee Jeong

IPC: H10K59/131

CPC classification number: H10K59/131

Abstract: An embodiment of the present disclosure comprises a display device including a substrate including a display area and a peripheral area around the display area, a thin-film transistor on the substrate in the display area and a display element electrically connected to the thin-film transistor, and a first voltage line and a second voltage line located on the substrate in the peripheral area and supplying power for driving the display element, wherein the first voltage line is a common voltage line and entirely surrounds the display area, the second voltage line is a driving voltage line and is arranged to correspond to one side of the display area, and the first voltage line and the second voltage line are on different layers.

公开(公告)号：US20200051506A1

公开(公告)日：2020-02-13

申请号：US16656873

申请日：2019-10-18

Applicant: Samsung Display Co., Ltd.

Inventor： Taehoon Yang ,  Jongchan Lee ,  Woonghee Jeong

IPC: G09G3/3258 ,  H01L27/32 ,  G09G3/3233

Abstract: A pixel, wherein: gates of second and fifth transistors receive a first gate signal; gates of third and fourth transistors respectively receive second and third gate signals; first terminals (FTs) of the second to fifth transistors respectively receive a data voltage, reference voltage, initialization voltage, and first power supply voltage (PSV); a second electrode of a second capacitor receives the first PSV; a second terminal (ST) of a light emitting element (LEE) receives a second PSV; a gate of a first transistor, STs of the second and third transistors, and a first electrode of a first capacitor are connected to a first node; STs of the first and fourth transistors, a FT of the LEE, and second and first electrodes respectively of the first and second capacitors are connected to a second node; and a ST of the fifth transistor is connected to a FT of the first transistor.

公开(公告)号：US10482821B2

公开(公告)日：2019-11-19

申请号：US16034359

申请日：2018-07-13

Applicant: Samsung Display Co., Ltd.

Inventor： Taehoon Yang ,  Jongchan Lee ,  Woonghee Jeong

IPC: G09G5/10 ,  G09G3/3258 ,  H01L27/32

Abstract: A pixel, wherein: gates of second and fifth transistors receive a first gate signal; gates of third and fourth transistors respectively receive second and third gate signals; first terminals (FTs) of the second to fifth transistors respectively receive a data voltage, reference voltage, initialization voltage, and first power supply voltage (PSV); a second electrode of a second capacitor receives the first PSV; a second terminal (ST) of a light emitting element (LEE) receives a second PSV; a gate of a first transistor, STs of the second and third transistors, and a first electrode of a first capacitor are connected to a first node; STs of the first and fourth transistors, a FT of the LEE, and second and first electrodes respectively of the first and second capacitors are connected to a second node; and a ST of the fifth transistor is connected to a FT of the first transistor.

公开(公告)号：US09647089B2

公开(公告)日：2017-05-09

申请号：US14696257

申请日：2015-04-24

Applicant: SAMSUNG DISPLAY CO., LTD.

Inventor： Woonghee Jeong ,  Joonhwa Bae ,  Youngki Shin ,  Yoonho Khang

IPC: H01L29/78 ,  H01L29/66 ,  H01L29/786 ,  H01L27/12 ,  H01L21/02

CPC classification number: H01L29/66757 ,  H01L21/02532 ,  H01L21/02675 ,  H01L27/1281 ,  H01L29/78675

Abstract: Thin film transistor substrate includes: a substrate; a crystalline silicon layer on the substrate; and a capping layer covering the crystalline silicon layer and including a first portion having a first thickness and a second portion having a second thickness that is greater than the first thickness.

公开(公告)号：US20160104726A1

公开(公告)日：2016-04-14

申请号：US14696257

申请日：2015-04-24

Applicant: SAMSUNG DISPLAY CO., LTD.

Inventor： Woonghee Jeong ,  Joonhwa Bae ,  Youngki Shin ,  Yoonho Khang

IPC: H01L27/12 ,  H01L21/02 ,  H01L29/423 ,  H01L29/786 ,  H01L29/66

CPC classification number: H01L29/66757 ,  H01L21/02532 ,  H01L21/02675 ,  H01L27/1281 ,  H01L29/78675

Abstract: Thin film transistor substrate includes: a substrate; a crystalline silicon layer on the substrate; and a capping layer covering the crystalline silicon layer and including a first portion having a first thickness and a second portion having a second thickness that is greater than the first thickness.

Abstract translation: 薄膜晶体管基板包括：基板; 基底上的晶体硅层; 以及覆盖所述晶体硅层并且包括具有第一厚度的第一部分和具有大于所述第一厚度的第二厚度的第二部分的覆盖层。

公开(公告)号：US20230032621A1

公开(公告)日：2023-02-02

申请号：US17956943

申请日：2022-09-30

Applicant: SAMSUNG DISPLAY CO., LTD.

Inventor： Jinyeong Kim ,  Jintaek Kim ,  Mijin PARK ,  Taehoon Yang ,  Woonghee Jeong

IPC: H01L27/32 ,  H01L51/56

Abstract: A display apparatus includes a substrate having a first transmissive area, a second transmissive area, a pixel area between the first transmissive area and the second transmissive area, a first pixel electrode in the pixel area, a first intermediate layer disposed on the first pixel electrode to emit light of a first color and an insulating layer covering edges of the first pixel electrode and defining a first emission area through a first opening exposing a portion of the first pixel electrode. A first partition wall is disposed on the insulating layer between the first emission area and the first transmissive area. A second partition wall is disposed on the insulating layer between the first emission area and the second transmissive area. An opposite electrode is disposed on the first intermediate layer in the pixel area and partially contacts the first partition wall and the second partition wall.

公开(公告)号：US11482581B2

公开(公告)日：2022-10-25

申请号：US16901107

申请日：2020-06-15

Applicant: SAMSUNG DISPLAY CO., LTD.

Inventor： Jinyeong Kim ,  Jintaek Kim ,  Mijin Park ,  Taehoon Yang ,  Woonghee Jeong

IPC: H01L27/32 ,  H01L51/56

Abstract: A display apparatus includes a substrate having a first transmissive area, a second transmissive area, a pixel area between the first transmissive area and the second transmissive area, a first pixel electrode in the pixel area, a first intermediate layer disposed on the first pixel electrode to emit light of a first color and an insulating layer covering edges of the first pixel electrode and defining a first emission area through a first opening exposing a portion of the first pixel electrode. A first partition wall is disposed on the insulating layer between the first emission area and the first transmissive area. A second partition wall is disposed on the insulating layer between the first emission area and the second transmissive area. An opposite electrode is disposed on the first intermediate layer in the pixel area and partially contacts the first partition wall and the second partition wall.