Abstract:
A liquid crystal display device includes a first substrate, a second substrate opposing the first substrate, a liquid crystal layer between the first substrate and the second substrate, a black matrix on one of the first substrate and the second substrate, the black matrix defining a pixel region, a gate line on the first substrate and including a line portion, an electrode portion and a compensation portion, the compensation portion having a closed loop shape, a data line intersecting the gate line, a source electrode extending from the data line and disposed on the electrode portion of the gate line, a drain electrode including one side disposed on the electrode portion of the gate line and another side at least partially disposed on the compensation portion of the gate line, and a pixel electrode connected to the drain electrode.
Abstract:
A display device includes a substrate including a display region, and a peripheral region that is outside of the display region, a plurality of dummy pads at the peripheral region, an insulating layer covering the plurality of dummy pads, wherein top surfaces of first portions of the insulating layer above the plurality of dummy pads are higher than top surfaces of second portions of the insulating layer between the plurality of dummy pads, and a plurality of pads over the second portions of the insulating layer at the peripheral region.
Abstract:
A nanocrystal display device includes a plurality of pixels; a gate line extended in a row direction; a data line extended in a column direction; and a second insulating layer on the data line. Each pixel includes first and second pixel areas adjacent to each other in the column direction; first and second pixel electrodes on the second insulating layer of the first and second pixel areas; a first black matrix on the second insulating layer, and having a step difference greater than that of the first and second pixel electrodes; a common electrode extended in the row direction, contacting the first black matrix and spaced apart from the second insulating layer in the first and second pixel areas, and a tunnel-shaped cavity between the common electrode, the first black matrix and the second insulating layer; and a liquid crystal layer in the tunnel-shaped cavity.
Abstract:
A display panel includes: a substrate including a main display area, a component area, and a peripheral area; a main sub-pixel at the main display area on the substrate; a main pixel circuit connected to the main sub-pixel, and including a main storage capacitor; an auxiliary sub-pixel at the component area on the substrate; an auxiliary pixel circuit at the peripheral area on the substrate, and including an auxiliary storage capacitor; and a connecting line connecting the auxiliary sub-pixel to the auxiliary pixel circuit. A capacity of the auxiliary storage capacitor is greater than a capacity of the main storage capacitor.
Abstract:
A display device includes a substrate including a display region, and a peripheral region that is outside of the display region, a plurality of dummy pads at the peripheral region, an insulating layer covering the plurality of dummy pads, wherein top surfaces of first portions of the insulating layer above the plurality of dummy pads are higher than top surfaces of second portions of the insulating layer between the plurality of dummy pads, and a plurality of pads over the second portions of the insulating layer at the peripheral region.
Abstract:
A display device and a multi-panel display device are disclosed. In one aspect, the display panel includes a plurality of display areas, an intermediate non-display area, a first non-display area, and a second non-display area. The display areas are spaced apart from one another in the first direction or the second direction. The intermediate non-display area is formed between the display areas. The first non-display area is formed at the outermost position in the first direction. The second non-display area is formed at the outermost position in the second direction. The gate driver is formed in the first non-display area, the second non-display area, and the intermediate non-display area and is configured to supply a gate signal to gate lines formed in each display area.
Abstract:
A display device and a multi-panel display device are disclosed. In one aspect, the display panel includes a plurality of display areas, an intermediate non-display area, a first non-display area, and a second non-display area. The display areas are spaced apart from one another in the first direction or the second direction. The intermediate non-display area is formed between the display areas. The first non-display area is formed at the outermost position in the first direction. The second non-display area is formed at the outermost position in the second direction. The gate driver is formed in the first non-display area, the second non-display area, and the intermediate non-display area and is configured to supply a gate signal to gate lines formed in each display area.
Abstract:
A liquid crystal display panel curved along a first direction includes an array substrate including first and second dots respectively including a plurality of first and second pixel areas, a main black matrix area, a sub-black matrix, a plurality of first and second pixel electrodes; an opposite substrate facing and coupled to the array substrate; and a liquid crystal layer between the array and opposite substrates. Each of the first pixel electrodes defines a corresponding first pixel area of the first pixel areas, each of the second pixel electrodes defines a corresponding second pixel area of the second pixel areas, the first pixel electrodes each have a same pattern, the second pixel electrodes each have a same pattern different from that of the first pixel electrodes, and a width of the sub-black matrix area is less than a width of the main black matrix area.
Abstract:
A display apparatus includes a thin film transistor substrate, a gate driver, and a connection line. The thin film transistor substrate includes a display area and a non-display area surrounding the display area. The display area includes gate lines extending along a first direction and data lines extending along a second direction crossing the first direction. The data lines are insulated from the gate lines. The gate driver is at a first non-display area of the non-display area, located outside the display area along the second direction, and is configured to apply a gate signal to the gate lines. The connection line extends along the second direction and couples the gate driver and the gate lines. A resistance of the connection line coupled to a gate line is substantially equal to a resistance of the connection line coupled to another gate line.
Abstract:
A pixel includes: a light emitting diode; a first transistor; a first capacitor connected between a first node and a gate electrode of the first transistor; a second transistor including a first electrode electrically connected to the gate electrode of the first transistor, a second electrode and a gate electrode which receives a first scan signal; and a third transistor including a first electrode electrically connected to the second electrode of the second transistor, a second electrode electrically connected to a third voltage line, and a gate electrode which receives a second scan signal. During an initialization period, an initialization voltage provided from the third voltage line is provided to the gate electrode of the first transistor through the third and second transistors, and, when the initialization period is terminated, at least one of the second transistor and the third transistor is turned off.