Gate driving circuit and display device including the same

    公开(公告)号:US10607519B2

    公开(公告)日:2020-03-31

    申请号:US14980581

    申请日:2015-12-28

    Abstract: Provided is a display device. The display device includes a display panel, a gate driving circuit, a sensor part, and a control voltage generator. The gate driving circuit includes driving transistors including a first control electrode and a second control electrode. The sensor part is configured to measure an environmental factor that changes a threshold voltage of the driving transistors. The control voltage generator is configured to apply to the second control electrode a control voltage for controlling the threshold voltage of the driving transistors on the basis of the environmental factor measured by the sensor part.

    Display device configured to be driven in one of a plurality of modes
    6.
    发明授权
    Display device configured to be driven in one of a plurality of modes 有权
    被配置为以多种模式之一驱动的显示装置

    公开(公告)号:US09542889B2

    公开(公告)日:2017-01-10

    申请号:US14478530

    申请日:2014-09-05

    Abstract: A display device is disclosed. In one aspect, the display device includes a timing controller configured to receive an image signal and a control signal and output a mode signal and a gate pulse signal based on the image signal and the control signal, wherein the mode signal has a voltage level and wherein the gate pulse signal has a frequency. The display device further includes a clock generator configured to generate a gate clock signal based on the mode signal and the gate pulse signal, wherein the gate clock signal has a voltage level and wherein the clock generator is further configured to set the voltage level of the gate clock signal based at least in part on the mode signal. The display device includes gate lines and a gate driver configured to drive gate lines based at least in part on the gate clock signal.

    Abstract translation: 公开了一种显示装置。 一方面,显示装置包括定时控制器,其被配置为基于图像信号和控制信号接收图像信号和控制信号并输出​​模式信号和门脉冲信号,其中模式信号具有电压电平,以及 其中所述栅极脉冲信号具有频率。 所述显示装置还包括时钟发生器,其被配置为基于所述模式信号和所述门脉冲信号产生栅极时钟信号,其中所述栅极时钟信号具有电压电平,并且其中所述时钟发生器还被配置为将所述栅极时钟信号 栅极时钟信号至少部分地基于模式信号。 显示装置包括栅极线和栅极驱动器,栅极驱动器被配置为至少部分地基于栅极时钟信号来驱动栅极线。

    Display apparatus
    7.
    发明授权

    公开(公告)号:US11574590B2

    公开(公告)日:2023-02-07

    申请号:US17695588

    申请日:2022-03-15

    Abstract: A display apparatus is disclosed, which includes a pixel. The pixel includes first through fifth transistors and a light emitting element. The first transistor includes a control electrode electrically connected to a first node, an input electrode that receives a first power voltage and an output electrode electrically connected to the light emitting element. The second transistor includes a control electrode that receives a scan signal, an input electrode that receives a grayscale data voltage and an output electrode electrically connected to a second node. The third transistor includes a control electrode electrically connected to the second node, an input electrode that receives a reference voltage and an output electrode electrically connected to the first node. The fourth transistor includes a control electrode that receives the scan signal, an input electrode that receives a bias data voltage and an output electrode electrically connected to the first node. The fifth transistor includes a control electrode that receives a sensing control signal, an input electrode that receives an initialization voltage and an output electrode electrically connected to the light emitting element.

    Gate driving circuit and display device having the same

    公开(公告)号:US09905188B2

    公开(公告)日:2018-02-27

    申请号:US14876305

    申请日:2015-10-06

    CPC classification number: G09G3/3696 G09G3/3677 G09G2310/0286 G11C19/287

    Abstract: Provided is a gate driving circuit including driving stages which provide a plurality of pixels of a display panel with gate signals, wherein any one of the driving stages includes a thin film transistor including a first control electrode, an activation part overlapping the first control electrode, an input electrode overlapping the activation part, an output electrode overlapping the activation part, and a second electrode disposed on the first control electrode and the activation part; and a capacitor including a first electrode disposed on the layer on which the first control electrode is disposed, a second electrode, which overlaps at least a portion of the first electrode and is disposed on the layer on which the input electrode is disposed, and a third electrode which overlaps the first and second electrodes and is electrically connected to the first electrode.

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