公开(公告)号：US20180083574A1

公开(公告)日：2018-03-22

申请号：US15272124

申请日：2016-09-21

Applicant: QUALCOMM Incorporated

Inventor： Kiyong Choi ,  Yi Zeng ,  Hong Sun Kim ,  Sasha Vujcic ,  Chirag Dipak Patel ,  Aleksandar Miodrag Tasic ,  Timothy Donald Gathman ,  Wu-Hsin Chen ,  Klaas van Zalinge

IPC: H03D7/14 ,  H03F3/193 ,  H03F3/21 ,  H03F3/45 ,  H03G3/30

CPC classification number: H03D7/1458 ,  H03D7/1441 ,  H03D7/1466 ,  H03F3/193 ,  H03F3/21 ,  H03F3/265 ,  H03F3/72 ,  H03F2200/09 ,  H03F2200/294 ,  H03F2200/451 ,  H03F2200/537 ,  H03F2200/541 ,  H03G3/3052 ,  H04B1/109 ,  H04W52/0209

Abstract: A method and apparatus are disclosed for a configurable mixer capable of operating in a linear, a legacy, and a low-power mode. In the linear mode, the configurable mixer is configured to operate as a double-balanced mixer to multiply a first differential signal by a second differential signal. In the legacy mode, the configurable mixer is configured to as a double-balanced mixer to multiply a differential signal by a single-ended signal. In the low-power mode, the configurable mixer is configured to operate as a single-balanced mixer to multiply a differential signal by a single-ended signal. The operating mode of the configurable mixer may be based, at least in part, on a mode control signal. In some embodiments, the configurable mixer may be included in an analog front end of a wireless communication device.

公开(公告)号：US20150084688A1

公开(公告)日：2015-03-26

申请号：US14037116

申请日：2013-09-25

Applicant: QUALCOMM Incorporated

Inventor： Li-Chung Chang ,  Bindu Gupta ,  Timothy Donald Gathman ,  Ibrahim Ramez Chamas

IPC: H03H11/04

CPC classification number: H03H11/0466 ,  H03F1/0277 ,  H03F1/08 ,  H03F1/223 ,  H03F3/193 ,  H03F3/45183 ,  H03F3/45475 ,  H03F3/45932 ,  H03F3/72 ,  H03F2200/06 ,  H03F2200/09 ,  H03F2200/165 ,  H03F2200/168 ,  H03F2200/171 ,  H03F2200/294 ,  H03F2200/336 ,  H03F2200/411 ,  H03F2200/429 ,  H03F2200/432 ,  H03F2200/534 ,  H03F2200/541 ,  H03F2200/543 ,  H03F2203/45352 ,  H03F2203/45396 ,  H03F2203/45506 ,  H03F2203/45511 ,  H03F2203/45512 ,  H03F2203/45516 ,  H03F2203/45521 ,  H03F2203/45522 ,  H03F2203/45526 ,  H03F2203/45528 ,  H03F2203/45594 ,  H03F2203/45618 ,  H03F2203/45702 ,  H03F2203/45728 ,  H03F2203/7215 ,  H03F2203/7221 ,  H03F2203/7236 ,  H03H2210/021 ,  H03H2250/00

Abstract: Techniques for designing baseband processing circuitry for radio IC's. In an aspect, techniques for differential-to-single-ended conversion in a baseband portion of the IC are disclosed to reduce the pin count and package size for RF IC's. In another aspect, the converter includes selectable narrowband and wideband amplifiers, wherein the wideband amplifiers may be implemented using transistor devices having smaller area than corresponding transistor devices of narrowband amplifiers. Further techniques for bypassing one or more elements, and for implementing a low-pass filter of the converter using an R-C filter network, are described.

Abstract translation: 无线电IC基带处理电路设计技术。 在一方面，公开了用于IC的基带部分中的差分到单端转换的技术，以减少RF IC的引脚数和封装尺寸。 在另一方面，转换器包括可选择的窄带和宽带放大器，其中宽带放大器可以使用具有比窄带放大器的相应晶体管器件小的面积的晶体管器件来实现。 描述了用于绕过一个或多个元件以及用于使用R-C滤波器网络来实现转换器的低通滤波器的进一步的技术。

公开(公告)号：US20200076387A1

公开(公告)日：2020-03-05

申请号：US16115475

申请日：2018-08-28

Applicant: Qualcomm Incorporated

Inventor： Timothy Donald Gathman ,  Chirag Dipak Patel ,  Lai Kan Leung ,  Xinmin Yu

IPC: H03F3/68 ,  H03F1/02 ,  H03F3/195

Abstract: An apparatus is disclosed for complementary variable gain amplification. In an example aspect, the apparatus includes a variable gain amplifier that includes multiple amplifiers. The multiple amplifiers include at least one first amplifier and at least one second amplifier cascaded together in series. The first amplifier includes a first set of transistors having a first doping type. At least a portion of the first set of transistors is configured to implement a first current mirror. The second amplifier includes a second set of transistors having a second doping type. At least a portion of the second set of transistors is configured to implement a second current mirror. The second current mirror is coupled to the first current mirror.

公开(公告)号：US10439593B2

公开(公告)日：2019-10-08

申请号：US15712406

申请日：2017-09-22

Applicant: QUALCOMM Incorporated

Inventor： Timothy Donald Gathman ,  Lai Kan Leung ,  Chirag Dipak Patel ,  Rajagopalan Rangarajan

IPC: H03H11/08 ,  H03H11/42 ,  H04B1/48 ,  H04B5/00 ,  H03H11/04 ,  H03H11/34

Abstract: Certain aspects of the present disclosure relate to multi-band filter architectures and methods for filtering signals using the multi-band filter architectures. One example multi-band filter generally includes a transconductance-capacitance (gm-C) filter and a reconfigurable load impedance coupled to an output of the gm-C filter, the reconfigurable load impedance comprising a first gyrator circuit coupled to a second gyrator circuit.

公开(公告)号：US10153934B1

公开(公告)日：2018-12-11

申请号：US15730040

申请日：2017-10-11

Applicant: QUALCOMM Incorporated

Inventor： Timothy Donald Gathman ,  Chirag Dipak Patel ,  Lai Kan Leung ,  Xinmin Yu ,  Rajagopalan Rangarajan

IPC: H04B1/16 ,  H04L27/26 ,  H04L27/01 ,  H04B7/08

Abstract: In certain aspects, a circuit comprises a low noise amplifier (LNA) configured to receive a radio frequency (RF) signal, a first mixer coupled to the low noise amplifier (LNA), and a first trans-impedance filter coupled to the first mixer. The first trans-impedance filter comprises a tunable inductor and capacitor (LC) network configured to be a portion of a doubly terminated LC ladder filter and a trans-impedance amplifier (TIA) coupled to the tunable inductor and capacitor (LC) network. The circuit further comprises a second mixer coupled to the low noise amplifier (LNA) and a second trans-impedance filter coupled to the second mixer.

公开(公告)号：US20180278277A1

公开(公告)日：2018-09-27

申请号：US15927022

申请日：2018-03-20

Applicant: QUALCOMM Incorporated

Inventor： Chirag Dipak Patel ,  Lai Kan Leung ,  Xinmin Yu ,  Timothy Donald Gathman ,  Ravi Sridhara

IPC: H04B1/00 ,  H03F3/72 ,  H03F1/42 ,  H03F3/24

CPC classification number: H04B1/0067 ,  H03F1/223 ,  H03F1/42 ,  H03F1/565 ,  H03F3/193 ,  H03F3/245 ,  H03F3/72 ,  H03F2200/111 ,  H03F2200/451 ,  H03F2203/7209 ,  H04B1/005 ,  H04B1/719

Abstract: Devices and techniques are described to extract specific frequency band signals from a wide-band radio-frequency signal. A network entity may include an antenna for receiving the wide-band radio-frequency signal and may include a receiver circuit for processing the wide-band radio-frequency signal. The receiver circuit may include a transconductance amplifier and a plurality of single-band circuits. The transconductance amplifier may be configured to generate an amplified wide-band radio-frequency signal and send it to one or more of the single-band circuits. Each single-band circuit may be configured to extract a different frequency band signal from the amplified wide-band radio-frequency signal.

公开(公告)号：US09991875B2

公开(公告)日：2018-06-05

申请号：US15352402

申请日：2016-11-15

Applicant: QUALCOMM Incorporated

Inventor： Timothy Donald Gathman ,  Ojas Choksi ,  Aleksandar Miodrag Tasic ,  Sasha Vujcic ,  Chirag Dipak Patel ,  Wu-Hsin Chen ,  Klaas Van Zalinge

IPC: H03F3/19 ,  H04W88/08 ,  H03H11/04 ,  H04L5/00

CPC classification number: H03H11/0427 ,  H03F3/19 ,  H03F2200/294 ,  H03F2200/451 ,  H03H11/126 ,  H03H2011/0483 ,  H03H2011/0488 ,  H04B1/0053 ,  H04B1/1036 ,  H04L5/0041 ,  H04W88/08

Abstract: A reconfigurable filter circuit has a first path including a transimpedance amplifier (TIA). The transimpedance amplifier has an input that receives an input current and an output that outputs a voltage. The reconfigurable filter circuit also includes a switchable feedback path. The switchable feedback path includes a first low-pass filter coupled to an output of the TIA. The switchable feedback path also includes a first switch to couple the feedback path to provide a feedback current to the first path resulting in a bandpass response in the output voltage when the switch is closed and a low-pass response in the output voltage when the switch is open.

公开(公告)号：US12009850B2

公开(公告)日：2024-06-11

申请号：US18317011

申请日：2023-05-12

Applicant: QUALCOMM Incorporated

Inventor： Janakiram Sankaranarayanan ,  Jun Tan ,  Lai Kan Leung ,  Timothy Donald Gathman ,  Mehmet Ipek ,  Ojas Choksi

IPC: H04B1/18 ,  H03F3/19

CPC classification number: H04B1/18 ,  H03F3/19 ,  H03F2200/294 ,  H03F2200/451

Abstract: An amplifying circuit includes a first reconfigurable amplifier configured to selectively operate in a cascode mode or a non-cascode mode, wherein an input of the first reconfigurable amplifier is coupled to a first input of the amplifying circuit, and an output of the first reconfigurable amplifier is coupled to an output of the amplifying circuit. The amplifying circuit also includes a second reconfigurable amplifier configured to selectively operate in the cascode mode or the non-cascode mode, wherein an input of the second reconfigurable amplifier is coupled to a second input of the amplifying circuit, and an output of the second reconfigurable amplifier is coupled to the output of the amplifying circuit.

公开(公告)号：US20220311423A1

公开(公告)日：2022-09-29

申请号：US17211716

申请日：2021-03-24

Applicant: Qualcomm Incorporated

Inventor： Timothy Donald Gathman ,  Lai Kan Leung ,  Chirag Dipak Patel ,  Xinmin Yu ,  Rajagopalan Rangarajan

IPC: H03H11/22

Abstract: An example apparatus includes a polyphase transconductance-capacitor filter. The polyphase filter includes a DC bias voltage node, a plus in-phase filter unit, a minus in-phase filter unit, a plus quadrature-phase filter unit, and a minus quadrature-phase filter unit. Each filter unit respectively includes an input node, an output node, and a control node. The polyphase filter also includes a plus in-phase switch and a minus in-phase switch. The plus in-phase switch is coupled to the control node of the plus in-phase filter unit, the DC bias voltage node, and the input node of one or both of the plus quadrature-phase filter unit and the minus quadrature-phase filter unit. The minus in-phase switch is coupled to the control node of the minus in-phase filter unit, the DC bias voltage node, and the input node of one or both of the plus quadrature-phase filter unit and the minus quadrature-phase filter unit.

公开(公告)号：US10651864B2

公开(公告)日：2020-05-12

申请号：US15962967

申请日：2018-04-25

Applicant: QUALCOMM Incorporated

Inventor： Timothy Donald Gathman ,  Yuhua Guo ,  Lai Kan Leung ,  Elias Dagher ,  Dinesh Jagannath Alladi

IPC: H03M1/00 ,  H03M1/12 ,  H04B1/16 ,  H03F3/45 ,  H03F3/19 ,  H03F3/24 ,  H03M1/52 ,  G04F5/00 ,  H03M1/54 ,  G11C27/02

Abstract: A receiver may include a time-interleaved charge sampler comprising a charge sampler switch in series with a charge sampler capacitor. The receiver may also include a current buffer configured to drive the time-interleaved charge sampler.