知搜-全球专利检索

  1. Login
  2. Sign Up

Search Results

25 records (took 0.032 seconds)

    VOLTAGE DEPENDENT DIE RC MODELING FOR SYSTEM LEVEL POWER DISTRIBUTION NETWORKS
    11.
    发明申请
    VOLTAGE DEPENDENT DIE RC MODELING FOR SYSTEM LEVEL POWER DISTRIBUTION NETWORKS 有权
    用于系统级配电网络的电压依赖DIE RC建模

    公开(公告)号：US20150198646A1

    公开(公告)日：2015-07-16

    申请号：US14157451

    申请日：2014-01-16

    Applicant: QUALCOMM INCORPORATED

    Inventor： Ryan Michael Coutts

    IPC: G01R27/26

    CPC classification number: G01R27/2605 ,  G06F17/5036 ,  G06F2217/78 ,  Y02E60/76 ,  Y04S40/22

    Abstract: Techniques for determining the voltage-dependent capacitance of a circuit are described herein. In one embodiment, a method for determining voltage-dependent capacitance of a circuit comprises measuring a parameter of the circuit at each one of a plurality of voltages, and, for each voltage, determining a capacitance of the circuit at the voltage by fitting a resistor-capacitor (RC) model of the circuit to the measured parameter of the circuit at the voltage.

    Abstract translation: 本文描述了用于确定电路的电压相关电容的技术。 在一个实施例中，一种用于确定电路的电压相关电容的方法包括在多个电压中的每一个处测量电路的参数，并且对于每个电压，通过拟合电阻器来确定电路的电容的电容 电容（RC）模型的电路到测量电路的电压参数。

    Estimating timing slack with an endpoint criticality sensor circuit
    12.
    发明授权
    Estimating timing slack with an endpoint criticality sensor circuit 有权

    公开(公告)号：US10048316B1

    公开(公告)日：2018-08-14

    申请号：US15492689

    申请日：2017-04-20

    Applicant: QUALCOMM Incorporated

    Inventor： Ryan Michael Coutts ,  Samy Shafik Tawfik Zaynoun ,  Paul Ivan Penzes

    IPC: G01R31/28 ,  G01R31/317 ,  G06F1/10 ,  G06F1/08

    Abstract: Various aspects of this disclosure describe measuring timing slack using an endpoint criticality sensor on a chip. A sensor circuit is attached to sensitive endpoints on the chip (e.g., logical gates in a timing critical path) so that the sensor circuit receives the endpoint's data signal and clock signal. The sensor circuit introduces skew between the data signal and the clock signal by delaying the data signal more than the clock signal, and compares skewed data signals to determine if an error occurs because of the induced skew. By delaying the data signal with different delay amounts and monitoring what delays cause errors, an amount of timing slack in the data signal and clock signal (e.g., margin to criticality) is measured during operation of the chip for relevant circuitry to the system implemented on the chip, compared to test circuitry operating while the chip is in a test mode.

    SYSTEMS AND METHODS FOR DETECTING THERMAL RUNAWAY
    16.
    发明申请
    SYSTEMS AND METHODS FOR DETECTING THERMAL RUNAWAY 审中-公开
    用于检测热阻的系统和方法

    公开(公告)号：US20160216719A1

    公开(公告)日：2016-07-28

    申请号：US14603058

    申请日：2015-01-22

    Applicant: QUALCOMM, Incorporated

    Inventor： Mehdi Saeidi ,  Rajat Mittal ,  Arpit Mittal ,  Ryan Michael Coutts

    IPC: G05D23/19 ,  G05B15/02

    CPC classification number: G05D23/1917 ,  G01K3/08 ,  G01K3/10 ,  G05B15/02 ,  G06F1/206

    Abstract: In one embodiment, a method of temperature control comprises receiving temperature readings from a temperature sensor on a chip, calculating one or more second derivatives of temperature with respect to time based on the temperature readings, and determining whether to perform temperature mitigation on the chip based on the one or more calculated second derivatives of temperature.

    Abstract translation: 在一个实施例中，温度控制的方法包括从芯片上的温度传感器接收温度读数，基于温度读数计算温度相对于时间的一个或多个二次导数，以及确定是否在基于芯片的基础上执行温度降低 在一个或多个计算的温度的二阶导数上。

    STATE-DEPENDENT CAPACITANCE ESTIMATION
    17.
    发明申请
    STATE-DEPENDENT CAPACITANCE ESTIMATION 有权
    状态依赖电容估计

    公开(公告)号：US20150198657A1

    公开(公告)日：2015-07-16

    申请号：US14157498

    申请日：2014-01-16

    Applicant: QUALCOMM INCORPORATED

    Inventor： Ryan Michael Coutts ,  Mohamed Waleed Allam

    IPC: G01R31/28 ,  G01R27/26

    CPC classification number: G01R31/2851 ,  G01R27/2605 ,  G06F1/263 ,  G06F1/3287 ,  H03K19/0013 ,  H03K19/00315

    Abstract: Techniques for estimating state-dependent capacitance of a circuit are described herein. In one embodiment, a method for determining a circuit state for a circuit comprises determining a capacitance of the circuit for each one of a plurality of circuit states, and selecting one of the circuit states based on the determined capacitances.

    Abstract translation: 本文描述了用于估计电路的状态相关电容的技术。 在一个实施例中，一种用于确定电路的电路状态的方法包括确定多个电路状态中的每一个的电路的电容，以及基于确定的电容来选择电路状态之一。

    ADAPTIVE VOLTAGE SCALING USING ANALYTICAL MODELS FOR INTERCONNECT DELAY
    20.
    发明申请
    ADAPTIVE VOLTAGE SCALING USING ANALYTICAL MODELS FOR INTERCONNECT DELAY 有权
    使用分析模型进行自适应延时的自适应电压调整

    公开(公告)号：US20170031376A1

    公开(公告)日：2017-02-02

    申请号：US14814112

    申请日：2015-07-30

    Applicant: QUALCOMM Incorporated

    Inventor： Ryan Michael Coutts ,  Paul Ivan Penzes ,  Shih-Hsin Jason Hu

    IPC: G05F1/625

    CPC classification number: G05F1/625 ,  G06F1/3206 ,  G06F1/324 ,  G06F1/3296 ,  Y02D10/126 ,  Y02D10/172

    Abstract: A method of setting a supply voltage in a device is disclosed. The method includes receiving a first plurality of inputs from a plurality of sensors that are representative of a gate delay of a signal path on the device, and receiving a second plurality of inputs from a plurality of temperature sensors. The method further includes estimating a plurality of interconnect delays for the signal path based on the second plurality of inputs, and determining the supply voltage for the signal path based on the first plurality of inputs and the plurality of interconnect delays.

    Abstract translation: 公开了一种在设备中设置电源电压的方法。 该方法包括从代表设备上的信号路径的门延迟的多个传感器接收第一多个输入，以及从多个温度传感器接收第二多个输入。 该方法还包括基于第二多个输入来估计用于信号路径的多个互连延迟，以及基于第一多个输入和多个互连延迟确定用于信号路径的电源电压。

Patent Agency Ranking