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公开(公告)号：US20230189492A1
公开(公告)日：2023-06-15
申请号：US18059611
申请日：2022-11-29
Applicant: NXP B.V.
Inventor： Philipp Franz Freidl , Mustafa Acar , Antonius Hendrikus Jozef Kamphuis , Jan Willem Bergman
CPC classification number: H05K9/0081 , H01Q1/526 , H01P3/08
Abstract: A Radio Frequency, “RF”, component and a method of making the same. The component comprises a first electrically conductive signal member for conveying an RF signal and a second electrically conductive signal member for conveying an RF signal. The component also comprises a barrier located between the first signal member and the second signal member electromagnetically to shield the first and second signal members from each other. The barrier comprises a first row of electrically conductive shielding members spaced apart along a longitudinal axis of the first row, and a second row of electrically conductive shielding members spaced apart along a longitudinal axis of the second row. Each shielding member comprises a polyhedron. The shielding members of the first row are offset with respect to the shielding members of the second row to prevent a direct line of sight between the first signal member and the second signal member.
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公开(公告)号：US11574760B2
公开(公告)日：2023-02-07
申请号：US16210524
申请日：2018-12-05
Applicant: NXP B.V.
Inventor： Mustafa Acar , Jawad Hussain Qureshi , Mark Pieter van der Heijden
Abstract: An inductor and a method of making an inductor. The inductor includes a stack of dielectric layers. The inductor also includes a plurality of metal levels comprising patterned metallic features of the inductor. Each metal level is located at an interface between adjacent dielectric layers in the stack. The patterned metallic features include a first plurality of inductor windings arranged in a substantially flat spiral in one of the metal levels. The patterned metallic features also include a second plurality of inductor windings in which each winding is located in a respective one of the plurality of metal levels. The first plurality of windings is connected in series with the second plurality of windings.
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公开(公告)号：US20210257358A1
公开(公告)日：2021-08-19
申请号：US17176875
申请日：2021-02-16
Applicant: NXP B.V.
IPC: H01L27/082 , H01L23/528 , H01L29/165 , H01L29/737 , H03F3/195
Abstract: A semiconductor device is described including a substrate and a plurality of layers. The semiconductor device includes a cascode arrangement of a first bipolar transistor and a second bipolar transistor. A first-bipolar-transistor-collector of the first bipolar transistor and a second-bipolar-transistor-emitter of the second bipolar transistor are at least partially located in a common region in the same layer of the semiconductor device.
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公开(公告)号：US10594274B2
公开(公告)日：2020-03-17
申请号：US16119692
申请日：2018-08-31
Applicant: NXP B.V.
Inventor： Jawad Hussain Qureshi , Mustafa Acar
Abstract: A power amplifier cell comprising a first power amplifier, a second power amplifier and a balun. The balun comprises a first inductor and a second inductor that define a first transformer; and a third inductor and a fourth inductor that define a second transformer. The following: (i) a parasitic capacitance of the first power amplifier; (ii) a leakage inductance of the first transformer; and (iii) a capacitive coupling between the first inductor and the second inductor, contribute to a first impedance matching circuit for the first power amplifier. Also, the following (iv) a parasitic capacitance of the second power amplifier; (v) a leakage inductance of the second transformer; and (vi) a capacitive coupling between the third inductor and the fourth inductor, contribute to a second impedance matching circuit for the second power amplifier.
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公开(公告)号：US20140152353A1
公开(公告)日：2014-06-05
申请号：US14172256
申请日：2014-02-04
Applicant: NXP B.V.
Inventor： Mustafa Acar , Katarzyna Nowak
IPC: H03K19/0185
CPC classification number: H03K19/018521 , H03K19/00315 , H03K19/018528
Abstract: A power stage has a differential output stage 2 driven by one or more buffer stages 4. The buffer stages 4 are implemented as high and low side buffers 12,14, each of which is itself a differential buffer implemented using transistors formed in an isolated-well technology such as triple-well CMOS.
Abstract translation: 功率级具有由一个或多个缓冲级4驱动的差分输出级2.缓冲级4被实现为高侧缓冲器12和低侧缓冲器12,14，每个缓冲器本身都是使用形成在隔离级中的晶体管实现的差分缓冲器， 良好的技术，如三阱CMOS。
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Patent Agency Ranking
公开(公告)号：US12284014B2
公开(公告)日：2025-04-22
申请号：US18306391
申请日：2023-04-25
Applicant: NXP B.V.
Inventor： Paul Mattheijssen , Mustafa Acar , Lucas Maria Florentinus De Maaijer
IPC: H04B7/06 , H04B7/0426
Abstract: A beamformer device for a multiple-input, multiple-output (MIMO) antenna system and method of operating a beamformer device is described. the beamformer device includes a number of beamformer channels. Each beamformer channel includes a RF terminal, an antenna connection terminal; and a power detector having a power detector output, The beamformer device includes a digital control interface comprising a serial data input and a serial data output; a control input coupled to the serial data input; and a beamformer monitor output configured to be selectively coupled to either the serial data output or the power detector output of one of the beamformer channels.
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公开(公告)号：US11990664B2
公开(公告)日：2024-05-21
申请号：US17809978
申请日：2022-06-30
Applicant: NXP B.V.
Abstract: A transmission line. The transmission line includes a reference electrode. The transmission line also includes a stripline. The stripline meanders within a plane. The stripline has a non-planar profile when viewed along a direction parallel to the plane.
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公开(公告)号：US11888204B2
公开(公告)日：2024-01-30
申请号：US17662572
申请日：2022-05-09
Applicant: NXP B.V.
Inventor： Mustafa Acar , Danny Wayling Chang , Dominicus Martinus Wilhelmus Leenaerts , Philipp Franz Freidl
Abstract: A transmission line includes a signal conductor and one or more return conductors, one or more of which having a stepped multi-layer structure. The return conductors may be disposed at opposite sides of the signal conductor. The return conductors may be multi-layer structures. At least some layers of each return conductor may have a stepped arrangement that defines a curve, such as an exponential curve. Additionally or alternatively, the signal conductor may be a stepped multi-layer structure, where at least some layers of the signal conductor may define a curve, such as an exponential curve. The signal conductor may be disposed at one or more upper layers of the transmission line or may be embedded at one or more layers near the center of the transmission line.
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公开(公告)号：US20230261374A1
公开(公告)日：2023-08-17
申请号：US18051941
申请日：2022-11-02
Applicant: NXP B.V.
Inventor： Lucas Maria Florentinus De Maaijer , Mustafa Acar , Paul Mattheijssen
CPC classification number: H01Q3/34 , H01Q5/28 , H04B1/0475 , H04B2001/0425
Abstract: A multiple-input multiple-output (MIMO) antenna system for a mobile cellular network and method is described. The MIMO antenna system includes an array of dual-polarization patch antennas each having first and second polarization feed-points, a first polarization radio chain and a second polarization radio chain. The MIMO antenna system includes a beamformer coupled to the first and second polarization radio chains. The beamformer includes a beamformer channel for a respective feedpoint and further includes a transmit amplifier and a detector (coupler) coupled to a transmit amplifier output. In one mode of operation, a signal is transmitted via the first polarization feed-point of a dual-polarisation patch antennas and a replica of the transmitted signal may be sensed using the coupler at the output of the transmit amplifier and routed via the second polarization radio chain to a digital predistortion module. The digital pre-distortion module is configured to digitally pre-distort a signal for transmission dependent on the replica of the RF signal.
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公开(公告)号：US20220311137A1
公开(公告)日：2022-09-29
申请号：US17651832
申请日：2022-02-21
Applicant: NXP B.V.
Inventor： Jan Willem Bergman , Mustafa Acar , Antonius Hendrikus Jozef Kamphuis , Dominicus MARTINUS WILHELMUS Leenaerts , Rajesh Mandamparambil , Paul Mattheijssen
Abstract: An integrated circuit comprising a package, phased antenna array and die. The die comprises a plurality of unit cells, wherein each unit cell is divided into quadrants. Each quadrant comprises a receiver terminal located on a first axis, and a transmitter terminal located on a second axis, wherein the first axis is orthogonal to the second axis, and there is mirror symmetry between the nearest neighbour quadrants in the unit cell. The package comprises a plurality of pairs of feed lines, each pair of feed lines comprising a receiver feed line and a transmitter feed line. The receiver feed line is connected to one of the receiver terminals and the transmitter feed line is connected to the transmitter terminal in the same die quadrant. The receiver feed line is orthogonal to the transmitter feed line. Each antenna element is coupled to a respective pair of feed lines.
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