Multichannel relay assembly with in line MEMS switches
    11.
    发明授权
    Multichannel relay assembly with in line MEMS switches 有权
    具有在线MEMS开关的多通道继电器组件

    公开(公告)号:US09362608B1

    公开(公告)日:2016-06-07

    申请号:US14558990

    申请日:2014-12-03

    IPC分类号: H01P5/18 H01P1/10

    摘要: An ohmic RF MEMS relay includes a substrate with a capacitive coupling, Csub; two actuating elements electrically coupled in series, so as to define a channel, wherein the actuating elements are configured to be independently actuated or simultaneously operated. The actuating elements have their own capacitive coupling, Cgap; a midpoint on the channel is in electrical communication with the actuating elements; and an anchor mechanically coupled to the substrate and supporting at least one of the actuating elements. Also, an ohmic RF MEMS relay that includes an input port; a plurality of first MEMS switches that make up a first switching group in electrical communication with the input port, thereby defining a plurality of channels each leading from each of the MEMS switches; and at least one outlet port along each of the channels distal from the first switching group and in electrical communication with the input port.

    摘要翻译: 欧姆RF MEMS继电器包括具有电容耦合的衬底,Csub; 串联电耦合的两个致动元件,以便限定通道,其中所述致动元件构造成独立地致动或同时操作。 致动元件具有自己的电容耦合,Cgap; 通道上的中点与致动元件电连通; 以及锚固件,其机械地联接到所述基板并且支撑所述致动元件中的至少一个。 另外,包括输入端口的欧姆RF MEMS继电器; 多个第一MEMS开关,其构成与所述输入端口电连通的第一开关组,从而限定每个从所述MEMS开关导出的多个通道; 以及沿着远离第一开关组的每个通道的至少一个出口端口,并与输入端口电连通。

    NON-MAGNETIC PACKAGE AND METHOD OF MANUFACTURE
    15.
    发明申请
    NON-MAGNETIC PACKAGE AND METHOD OF MANUFACTURE 审中-公开
    非磁性包装及其制造方法

    公开(公告)号:US20160126195A1

    公开(公告)日:2016-05-05

    申请号:US14529311

    申请日:2014-10-31

    IPC分类号: H01L23/552

    摘要: A non-magnetic hermetic package includes walls that surround an open cavity, with a generally planar non-magnetic and metallic seal ring disposed in a continuous loop around upper edges of the walls; a sensitive component that is bonded within the cavity; and a non-magnetic lid that is sealed to the seal ring to close the cavity by a metallic seal.

    摘要翻译: 非磁性密封包装包括围绕开放空腔的壁,具有围绕壁的上边缘设置在连续环中的大致平面的非磁性和金属密封环; 在腔内结合的敏感部件; 以及密封到密封环以通过金属密封封闭空腔的非磁性盖。

    Integrated micro-electromechanical switches and a related method thereof
    16.
    发明授权
    Integrated micro-electromechanical switches and a related method thereof 有权
    集成微机电开关及其相关方法

    公开(公告)号:US09117610B2

    公开(公告)日:2015-08-25

    申请号:US14314344

    申请日:2014-06-25

    IPC分类号: H01H51/22 H01H59/00 B81B7/00

    摘要: A system includes a plurality of micro-electromechanical switches including a plurality of gates, coupled to each other. Each micro-electromechanical switch includes a beam electrode disposed on a substrate. A beam includes an anchor portion coupled to the beam electrode. The beam includes a first beam portion extending from the anchor portion along a first direction; and a second beam portion extending from the anchor portion along a second direction opposite to the first direction. A first control electrode and a first contact electrode are disposed on the substrate, facing the first beam portion. A second control electrode and a second contact electrode are disposed on the substrate, facing the second beam portion. The first control electrode and the second control electrode are coupled to form a gate among the plurality of gates. The plurality of micro-electromechanical switches is arranged in at least one of a series arrangement, parallel arrangement.

    摘要翻译: 一种系统包括多个彼此耦合的包括多个门的微机电开关。 每个微机电开关包括设置在基板上的束电极。 梁包括联接到梁电极的锚固部分。 梁包括从锚固部分沿着第一方向延伸的第一梁部分; 以及从所述锚固部分沿着与所述第一方向相反的第二方向延伸的第二梁部分。 第一控制电极和第一接触电极设置在基板上,面对第​​一光束部分。 第二控制电极和第二接触电极设置在基板上,面对第​​二光束部分。 第一控制电极和第二控制电极被耦合以在多个栅极之间形成栅极。 多个微电子机械开关被布置成串联布置,平行布置中的至少一个。

    Capacitive micromachined ultrasonic transducer (CMUT) devices and methods of manufacturing

    公开(公告)号:US11440051B2

    公开(公告)日:2022-09-13

    申请号:US16802345

    申请日:2020-02-26

    摘要: A method of forming a capacitive micromachined ultrasonic transducer (CMUT) device includes bonding a CMUT substrate to a silicon on insulator (SOI) substrate. The CMUT substrate has a first thickness and the SOI substrate includes a handle, a buried oxide layer, and a device layer. At least one of the CMUT substrate or the SOI substrate includes a patterned dielectric layer. The device layer is bonded to the patterned dielectric layer to form a plurality of sealed cavities and the device layer forms a diaphragm of the plurality of cavities. The method further includes reducing the first thickness of the CMUT substrate to a second thickness and forming a plurality of through-silicon vias from a second surface of the CMUT substrate opposite the first surface.

    CAPACITIVE MICROMACHINED ULTRASONIC TRANSDUCER (CMUT) DEVICES AND METHODS OF MANUFACTURING

    公开(公告)号:US20210260622A1

    公开(公告)日:2021-08-26

    申请号:US16802345

    申请日:2020-02-26

    IPC分类号: B06B1/02 B81B3/00 B81C1/00

    摘要: A method of forming a capacitive micromachined ultrasonic transducer (CMUT) device includes bonding a CMUT substrate to a silicon on insulator (SOI) substrate. The CMUT substrate has a first thickness and the SOI substrate includes a handle, a buried oxide layer, and a device layer. At least one of the CMUT substrate or the SOI substrate includes a patterned dielectric layer. The device layer is bonded to the patterned dielectric layer to form a plurality of sealed cavities and the device layer forms a diaphragm of the plurality of cavities. The method further includes reducing the first thickness of the CMUT substrate to a second thickness and forming a plurality of through-silicon vias from a second surface of the CMUT substrate opposite the first surface.

    WAFER LEVEL STACKED STRUCTURES HAVING INTEGRATED PASSIVE FEATURES

    公开(公告)号:US20210125918A1

    公开(公告)日:2021-04-29

    申请号:US16666016

    申请日:2019-10-28

    摘要: A method includes obtaining an active feature layer having a first surface bearing one or more active feature areas. A first capacitor plate of a first capacitor is formed on an interior surface of a cap. A second capacitor plate of the first capacitor is formed on an exterior surface of the cap. The first capacitor plate of the first capacitor overlays and is spaced apart from the second capacitor plate of the first capacitor along a direction that is orthogonal to the exterior surface of the cap to form the first capacitor. The cap is coupled with the first surface of the active feature layer such that the second capacitor plate of the first capacitor is in electrical communication with at least a first active feature of the active feature layer. The cap is bonded with the passive layer substrate.