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公开(公告)号:US20250138478A1
公开(公告)日:2025-05-01
申请号:US18917739
申请日:2024-10-16
Inventor: Yong Hae KIM , Jong-Heon YANG , Kyunghee CHOI , Jae-Eun PI , Chi-Sun HWANG
IPC: G03H1/22
Abstract: Disclosed are a hologram reading device and a hologram reading method, the hologram reading device including a hologram element having a hologram pattern, a detector configured to detect a reflection beam generated in the hologram pattern, and a controller connected to the detector and configured to read information the hologram pattern using a detection signal of the reflection beam, wherein the hologram pattern may have the width or diameter smaller than 225 nm.
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公开(公告)号:US20230097393A1
公开(公告)日:2023-03-30
申请号:US17520853
申请日:2021-11-08
Inventor: Sung Haeng CHO , Byung-Do YANG , Sooji NAM , Jaehyun MOON , Jae-Eun PI , Jae-Min KIM
IPC: H01L27/092 , H01L29/24 , H03K19/0185 , H03K19/0948 , H01L27/02
Abstract: Provided is a Complementary Metal Oxide Semiconductor (CMOS) logic element. The CMOS logic element includes a substrate including a PMOS area, a circuit wiring structure including an insulating layer and a wiring layer alternately stacked on the substrate, wherein the circuit wiring structure includes an NMOS area vertically spaced apart from the PMOS area, a first transistor disposed on the PMOS area, and a second transistor disposed on the NMOS area and complementarily connected to the first transistor, wherein the first transistor includes a first gate electrode, source/drain areas formed on the PMOS area on both sides of the first gate electrode, and a first channel connecting the source and drain areas to each other, wherein the second transistor includes a second gate electrode and a second channel vertically overlapping the second gate electrode, wherein the first channel includes silicon, wherein the second channel includes an oxide semiconductor.
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公开(公告)号:US20220199836A1
公开(公告)日:2022-06-23
申请号:US17523320
申请日:2021-11-10
Applicant: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE , Korea Advanced Institute of Science and Technology
Inventor: Chi-Sun HWANG , SangHee PARK , KwangHeum LEE , Jae-Eun PI , SeungHee LEE , Jong-Heon YANG , Ji Hun CHOI
IPC: H01L29/786 , H01L29/66 , H01L29/40 , H01L29/49
Abstract: A vertical channel thin film transistor includes substrate, lower source/drain electrode, spacer layer, upper source/drain electrode covering portion of upper surface of the spacer layer, interlayer insulating pattern covering portion of upper surface of the upper source/drain electrode and upper surface of the spacer layer exposed by the upper source/drain electrode, contact hole disposed on the lower source/drain electrode and passing through the interlayer insulating pattern, the upper source/drain electrode, and the spacer layer, active pattern covering inner wall and bottom surface of the contact hole and extending over upper surface of the upper source/drain electrode and upper surface of the interlayer insulating pattern, gate insulating pattern filling portion of the contact hole and extending along upper surface of the active pattern, and gate electrode filling portion of the contact hole and extending along upper surface of the gate insulating pattern.
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公开(公告)号:US20220104343A1
公开(公告)日:2022-03-31
申请号:US17459815
申请日:2021-08-27
Inventor: Ji-Young OH , Seung Youl KANG , Sujung KIM , Chan Woo PARK , Himchan OH , Jae-Eun PI , Chi-Sun HWANG
Abstract: Provided are a stretchable electronic device and a method for manufacturing the same. The stretchable electronic device includes lines having lower pads, a chip provided on the lower pads and having first upper pads, which are wider than the lower pads, and an adhesive layer provided outside the lower pads or between the lower pads and bonded to the first upper pads.
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公开(公告)号:US20190312148A1
公开(公告)日:2019-10-10
申请号:US16374095
申请日:2019-04-03
Inventor: Jae-Eun PI , Seung Youl KANG , Jaehyun MOON , Seongdeok AHN , Jongchan LEE , Chul Woong JOO , Chi-Sun HWANG
IPC: H01L29/786 , H01L29/66
Abstract: Provided is a thin film transistor including a substrate, a first spacer on the substrate, a second spacer on the first spacer, a light shield layer intervened between the first spacer and the second spacer, a semiconductor layer on the second spacer, and a gate electrode on the semiconductor layer, wherein the light shield layer includes a plurality of inclined surfaces against a top surface of the substrate.
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公开(公告)号:US20190213380A1
公开(公告)日:2019-07-11
申请号:US16219373
申请日:2018-12-13
Inventor: Chul Woong JOO , Jonghee LEE , Jae-Eun PI , Byoung-Hwa KWON , Hyunsu CHO , Seung Youl KANG , Seongdeok AHN , Jeong Ik LEE , Nam Sung CHO , Sung Haeng CHO , Woojin SUNG , Jongchan LEE
IPC: G06K9/00
CPC classification number: G06K9/0004 , H01L51/5215 , H01L51/5234 , H01L51/5237
Abstract: Provided is an optical fingerprint recognition sensor. The optical fingerprint recognition sensor includes a transparent light emitting unit configured to emit light to a fingerprint, a light receiving unit disposed below the light emitting unit to vertically overlap the light emitting unit and configured to receive light reflected by the fingerprint, and a control unit disposed below the light emitting unit to vertically overlap the light emitting unit and configured to control the light emitting unit and the light receiving unit. The light emitting unit includes an organic layer.
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公开(公告)号:US20170176804A1
公开(公告)日:2017-06-22
申请号:US15356058
申请日:2016-11-18
Inventor: Jihun CHOI , Jae-Eun PI
IPC: G02F1/1345 , H01L23/00 , H01L27/12
CPC classification number: G02F1/13458 , H01L23/498 , H01L24/05 , H01L24/06 , H01L24/14 , H01L24/16 , H01L24/17 , H01L27/124 , H01L2224/0401 , H01L2224/05025 , H01L2224/06102 , H01L2224/1403 , H01L2224/16227 , H01L2224/16237 , H01L2224/1703 , H01L2224/81447 , H05K1/113 , H05K2201/094 , H05K2201/09509 , H05K2201/09672 , H05K2201/10659 , H05K2201/10674 , H01L2924/00014
Abstract: Provided is display panel including a substrate including a pixel area and a pad area; and a first conductive line and a second conductive line stacked on the substrate, wherein the first conductive line includes a first part disposed on the pixel area and a second part disposed on the pad area and the second conductive line includes a first part disposed on the pixel area and a second part disposed on the pad area. The first part of the first conductive line and the first part of the second conductive line are parallel to each other and the second part of the first conductive line and the second part of the second conductive line are overlapped vertically.
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公开(公告)号:US20250098218A1
公开(公告)日:2025-03-20
申请号:US18762381
申请日:2024-07-02
Inventor: Jae-Eun PI , Seung Youl KANG , Yong Hae KIM , Joo Yeon KIM , Hee-ok KIM , Jaehyun MOON , Jong-Heon YANG , Himchan OH , Seong-Mok CHO , Ji Hun CHOI , Chi-Sun HWANG
IPC: H01L29/417 , G02F1/1362 , G02F1/1368 , H01L27/12 , H01L29/786
Abstract: A thin film transistor includes a first gate electrode on a substrate, a gate insulating film on the first gate electrode, a first active layer on the gate insulating film, a drain electrode on one side of the first active layer, a sidewall spacer on a side wall of the drain electrode, and a first source electrode provided on the other side of the first active layer and a sidewall of the sidewall spacer.
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公开(公告)号:US20250089300A1
公开(公告)日:2025-03-13
申请号:US18767665
申请日:2024-07-09
Inventor: Yong Hae KIM , Chi-Sun HWANG , Jong-Heon YANG , Seong-Mok CHO , Jae-Eun PI
IPC: H01L29/786 , H01L23/14 , H01L29/24 , H01L29/417 , H01L29/45
Abstract: Provided is an oxide thin film transistor. The transistor includes a gate electrode on a center of a substrate, an active layer provided on the gate electrode and the substrate and including a metal oxide, and a source electrode and a drain electrode provided on the active layer, which is on both sides of the gate electrode. The source electrode and the drain electrode may each include a first metal layer and a second metal layer on the first metal layer.
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公开(公告)号:US20230091070A1
公开(公告)日:2023-03-23
申请号:US17889204
申请日:2022-08-16
Inventor: Ji Hun CHOI , Chan Woo PARK , Ji-Young OH , Seung Youl KANG , Yong Hae KIM , Hee-ok KIM , Jeho NA , Jaehyun MOON , Jong-Heon YANG , Himchan OH , Seong-Mok CHO , Sung Haeng CHO , Jae-Eun PI , Chi-Sun HWANG
IPC: H01B7/06 , H01B3/30 , H01B13/008 , H05K7/06
Abstract: Provided are stretchable electronics and a method for manufacturing the same. The stretchable electronics may include a substrate, a plurality of electronic elements disposed to be spaced apart from each other on the substrate, and a wire structure disposed on the substrate to connect the plurality of electronic elements to each other. The wire structure may include an insulator extending from one of the electronic elements to the other of the adjacent electronic elements and a metal wire configured to cover a top surface and side surfaces of the insulator. The insulator may include at least one bent part in a plan view.
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