公开(公告)号：US20070172310A1

公开(公告)日：2007-07-26

申请号：US11655652

申请日：2007-01-19

申请人： Sheng-Hsiung Yang ,  Mu-Kun Hsueh

发明人： Sheng-Hsiung Yang ,  Mu-Kun Hsueh

IPC分类号： F16J1/16

CPC分类号： F16M11/10 ,  E05D7/1077 ,  E05Y2900/606 ,  F16M11/041 ,  F16M2200/08 ,  H01Q1/084 ,  H01Q1/125 ,  H01Q1/242 ,  Y10T403/32861

摘要： A rotary spindle structure applied in a housing is provided, which includes two spindle lugs having a suspended resilient butt joint respectively. When a spindle rod is fit in the spindle lugs, both end faces of the spindle rod bear against the resilient butt joints, so that the resilient butt joints are forced to expand outwards till a pivot hole of the spindle rod is snapped with protruding walls of the spindle lugs, and thus, the spindle rod is freely rotationally connected to the spindle lugs. Furthermore, a pair of reinforcing pads is used to bear against the resilient butt joints to enhance the joining strength between the spindle lugs and the spindle rod.

摘要翻译： 提供了一种应用在壳体中的旋转主轴结构，其包括分别具有悬挂的弹性对接接头的两个主轴凸耳。 当主轴杆配合在主轴凸耳中时，主轴杆的两个端面抵靠弹性对接接头，使得弹性对接接头被迫向外扩展，直到主轴的枢轴孔被卡住，突出的壁 主轴凸耳，因此，主轴杆自由旋转地连接到主轴凸耳。 此外，一对加强垫用于抵靠弹性对接接头，以增强主轴凸耳与主轴之间的接合强度。

公开(公告)号：US06350641B1

公开(公告)日：2002-02-26

申请号：US09572152

申请日：2000-05-17

申请人： Sheng-Hsiung Yang

发明人： Sheng-Hsiung Yang

IPC分类号： H01L218238

CPC分类号： H01L29/66568 ,  H01L29/66575 ,  H01L29/66659 ,  H01L29/7833 ,  H01L29/7834 ,  H01L29/7835

摘要： A method for fabricating a high vltage device with double diffusion structure provides a pad oxide layer on a silicon substrate. A silicon nitride layer is formed and patterned to expose isolation regions. A first mask covers the partial isolation regions spaced from the silicon nitride layer. A well region is formed underlay the silicon nitride layer. A second mask covers the partial isolation region spaced from the silicon nitride layer and the partial silicon nitride layer. First doped regions are formed underlay the partial silicon nitride layer. Then the isolation regions are formed partially on the first doped regions. Next, a third mask covers the pad oxide layer and the partial isolation regions and second doped regions are formed spaced from the first doped regions and below the isolation regions. A gate is formed and located between the first doped regions and a spacer on a side-wall thereof. Third doped regions are formed in the first doped regions.

摘要翻译： 用于制造具有双扩散结构的高电压装置的方法在硅衬底上提供焊盘氧化层。 形成氮化硅层并图案化以暴露隔离区域。 第一掩模覆盖与氮化硅层间隔开的部分隔离区域。 形成衬底氮化硅层的阱区。 第二掩模覆盖与氮化硅层和部分氮化硅层隔开的部分隔离区域。 第一掺杂区域形成为衬底部分氮化硅层。 然后，隔离区域部分地形成在第一掺杂区域上。 接下来，第三掩模覆盖焊盘氧化物层，并且部分隔离区域和第二掺杂区域与第一掺杂区域隔开并且在隔离区域下方形成。 栅极形成并位于第一掺杂区域和位于其侧壁上的间隔物之间​​。 第三掺杂区域形成在第一掺杂区域中。

公开(公告)号：US06569700B2

公开(公告)日：2003-05-27

申请号：US09878369

申请日：2001-06-12

申请人： Sheng-Hsiung Yang

发明人： Sheng-Hsiung Yang

IPC分类号： H01L2100

CPC分类号： H01L31/101 ,  H01L27/1463 ,  H01L27/14654

摘要： A method of reducing leakage current of a photodiode on a semiconductor wafer. The semiconductor wafer has a p-type substrate, a photosensing area, and at least one shallow trench surrounding the photosensing area. First, a doped polysilicon layer containing p-type dopants is formed in the shallow trench. Then, the p-type dopant in the doped polysilicon layer is caused to diffuse into the p-type substrate to form a p-type doped region surrounding a bottom of the shallow trench and walls of the shallow trench. After that, the doped polysilicon layer is removed and an insulator material is filled into the shallow trench to form a shallow trench isolation (STI) structure. Finally, an n-type doped region is implanted to form a photosensor. Here, the p-type doped region in the photosensing area is used to decrease the electric field surrounding the photosensing area and decrease the leakage current.

公开(公告)号：US06306700B1

公开(公告)日：2001-10-23

申请号：US09633468

申请日：2000-08-07

申请人： Sheng-Hsiung Yang

发明人： Sheng-Hsiung Yang

IPC分类号： H01L2138

CPC分类号： H01L21/823892 ,  H01L21/823814 ,  H01L21/823857

摘要： A method for forming high voltage devices compatible with low voltage devices on a semiconductor substrate is provided. A substrate is provided. An oxide layer is formed on the substrate. An N well is formed in the substrate. A P well is formed opposite to the N well in the substrate. A plurality of N-field regions are formed as drift regions in the P well and as isolation regions in the N well. A plurality of P-field regions are formed as drift regions in the N well and as isolation regions in the P well region. A plurality of field oxide regions are formed on the N well and the P well in the substrate. N− type doped regions are formed in the P well through an N-grade implantation, prior to a gate oxide layer and a polysilicon layer formation. An N+ type doped region in the N−type doped region is formed as a source/drain region for an NMOS transistor in the P well. A P+ type doped region is formed as a source/drain region for a PMOS transistor in the N well. The polysilicon layer is formed and defined as a gate on the gate oxide layer across a channel for the NMOS/PMOS transistor and a portion of the field oxide region adjoining thereto.

摘要翻译： 提供了一种用于形成与半导体衬底上的低电压器件兼容的高电压器件的方法。 提供基板。 在基板上形成氧化层。 在衬底中形成N阱。 P阱与衬底中的N阱相对地形成。 在P阱中形成多个N场区域作为漂移区域，并在N阱中形成隔离区域。 多个P场区域形成为N阱中的漂移区域和P阱区域中的隔离区域。 在衬底中的N阱和P阱上形成多个场氧化物区域。 在栅极氧化层和多晶硅层形成之前，通过N级注入在P阱中形成N型掺杂区。 形成N型掺杂区域中的N +型掺杂区域作为P阱中的NMOS晶体管的源极/漏极区域。 形成P +型掺杂区域作为N阱中的PMOS晶体管的源极/漏极区域。 在NMOS / PMOS晶体管的沟道和与其相邻的场氧化物区域的一部分上形成并定义为栅极氧化层上的栅极和多晶硅层。

公开(公告)号：US08164471B2

公开(公告)日：2012-04-24

申请号：US12479829

申请日：2009-06-07

申请人： Sheng-Hsiung Yang

发明人： Sheng-Hsiung Yang

IPC分类号： G08B21/00

CPC分类号： G01P15/16 ,  G01P3/50 ,  G11B19/043

摘要： A system and method for detecting a falling state of an electronic device include setting a time interval to collect position information of the electronic device and one or more alarm means, activating a global position system to locate a position of the electronic device, and acquiring position information of the electronic device at each time interval. The system and method further include calculating an acceleration of the electronic device, and activating one or more of the alarm means if the calculated acceleration is larger or equal to the acceleration of gravity.

摘要翻译： 用于检测电子设备的下降状态的系统和方法包括设置收集电子设备的位置信息的时间间隔和一个或多个报警装置，激活全局位置系统以定位电子设备的位置，以及获取位置 每个时间间隔的电子设备的信息。 该系统和方法还包括计算电子设备的加速度，并且如果所计算的加速度大于或等于重力加速度，则激活报警装置中的一个或多个。

公开(公告)号：US20070115194A1

公开(公告)日：2007-05-24

申请号：US11600883

申请日：2006-11-17

申请人： Jia-Jiu Song ,  Sheng-Hsiung Yang ,  Jr-Ren Jeng ,  Mu-Kun Hsueh

发明人： Jia-Jiu Song ,  Sheng-Hsiung Yang ,  Jr-Ren Jeng ,  Mu-Kun Hsueh

IPC分类号： H01Q13/00

CPC分类号： H01Q9/28 ,  H01Q9/40

摘要： An antenna structure including a ground plate, a hollow bolt, and a conductive conical dome is provided. The hollow bolt passes through the ground plate, and a signal wire is laid in the hollow bolt. An insulator is disposed between the signal wire and the hollow bolt for providing electrical isolation therebetween. The conductive conical dome is connected with one end of the signal wire. The hollow bolt and a nut are provided to fix the antenna on a wall or a ceiling. Since the signal wire is laid in the hollow bolt, the signal wire can be connected to a signal source only by connecting a signal cable to the hollow bolt.

摘要翻译： 提供了包括接地板，中空螺栓和导电圆锥形的天线结构。 中空螺栓穿过接地板，信号线铺设在中空螺栓中。 绝缘体设置在信号线和中空螺栓之间，用于在它们之间提供电隔离。 导电锥形圆顶与信号线的一端连接。 提供中空螺栓和螺母以将天线固定在墙壁或天花板上。 由于信号线铺设在中空螺栓中，信号线只能通过将信号线连接到中空螺栓而连接到信号源。

公开(公告)号：US20060017114A1

公开(公告)日：2006-01-26

申请号：US10710616

申请日：2004-07-25

申请人： Jung-Ching Chen ,  Jy-Hwang Lin ,  Sheng-Hsiung Yang ,  Jim SU

发明人： Jung-Ching Chen ,  Jy-Hwang Lin ,  Sheng-Hsiung Yang ,  Jim SU

IPC分类号： H01L29/78 ,  H01L21/8238

CPC分类号： H01L29/1083 ,  H01L21/2652 ,  H01L21/823814 ,  H01L21/823857 ,  H01L21/823878 ,  H01L21/823892 ,  H01L29/7833

摘要： A high-voltage semiconductor MOS process that is fully compatible with low-voltage MOS process is provided. The high-voltage N/P well are implanted into the substrate prior to the definition of active areas. The channel stop doping regions are formed after the formation of field oxide layers, thus avoiding lateral diffusion of the channel stop doping regions. In addition, the grade drive-in process used to activate the grade doping regions in the high-voltage device area and the gate oxide growth of the high-voltage devices are performed simultaneously.

摘要翻译： 提供了与低压MOS工艺完全兼容的高压半导体MOS工艺。 在定义有源区之前，将高压N / P阱注入到衬底中。 在形成场氧化物层之后形成通道停止掺杂区域，从而避免沟道停止掺杂区域的横向扩散。 此外，用于激活高压器件区域中的等级掺杂区域和高压器件的栅极氧化物生长的等级驱入工艺同时进行。

公开(公告)号：US06797983B2

公开(公告)日：2004-09-28

申请号：US10060460

申请日：2002-01-30

申请人： Ralph Chen ,  Marcus Yang ,  Yuan-Li Tsai ,  Ching-Chun Huang ,  Sheng-Hsiung Yang

发明人： Ralph Chen ,  Marcus Yang ,  Yuan-Li Tsai ,  Ching-Chun Huang ,  Sheng-Hsiung Yang

IPC分类号： H01L2100

CPC分类号： G02F1/136277

摘要： A method is provided to fabricate a LCOS back plane structure. The present invention utilized a HV device such as HV CMOS transistor (high voltage complementary metal oxide semiconductor transistor) and a HV capacitor layer are applied to the substrate. Furthermore, the HV capacitor layer has a higher dielectric layer and coupling ratio to sustain the higher operating voltage, such that the operating capacitance can be raised. Moreover, the HV CMOS transistor is combined with a mirror layer which has a higher reflective property, such that the LCOS back-plate structure has the better contrast and chrominance output in per area unit, when the operating voltage range is increased.

摘要翻译： 提供了一种制造LCOS背板结构的方法。 本发明将HV HV晶体管（高电压互补金属氧化物半导体晶体管）和HV电容层用于HV基板。 此外，HV电容层具有更高的介电层和耦合比，以维持更高的工作电压，使得可以提高工作电容。 此外，HV CMOS晶体管与具有较高反射特性的镜面层组合，使得当工作电压范围增加时，LCOS背板结构在每单位面积具有更好的对比度和色度输出。

公开(公告)号：US06245592B1

公开(公告)日：2001-06-12

申请号：US09572153

申请日：2000-05-17

申请人： Sheng-Hsiung Yang

发明人： Sheng-Hsiung Yang

IPC分类号： H01L2100

CPC分类号： H01L27/14689 ,  H01L27/14609 ,  H01L27/14656

摘要： A method for forming complementary metal-oxide semiconductor sensor is disclosed. The method includes the following steps. Firstly, a semiconductor substrate is provided. A first oxide layer is formed on the surface of the semiconductor substrate. A nitride layer is formed on the surface of the first oxide layer. Thus, p-type ions are first implanted into the semiconductor substrate to form a p-type well region. The p-type well region is annealed. The nitride layer is removed. The first oxide layer is removed. The second oxide layer is deposited on the surface of the semiconductor substrate. The p-type ions are secondly implanted into the second p-type well region to form a p-type field. The p-type field is annealed. The n-type ions are thirdly implanted into the semiconductor substrate as an n-type region abutting the oxide layer below. The n+-type ions are fourthly implanted into the n-type region as n+-type regions. The p+-type ions are fifthly implanted into the p-type field as a p+-type region. The n+-type region and the p+-type region are annealed to complete a semiconductor sensor device.

摘要翻译： 公开了一种形成互补金属氧化物半导体传感器的方法。 该方法包括以下步骤。 首先，提供半导体衬底。 第一氧化物层形成在半导体衬底的表面上。 在第一氧化物层的表面上形成氮化物层。 因此，首先将p型离子注入到半导体衬底中以形成p型阱区。 p型阱区退火。 去除氮化物层。 去除第一氧化物层。 第二氧化物层沉积在半导体衬底的表面上。 将p型离子二次注入到第二p型阱区中以形成p型场。 p型场退火。 将n型离子第三次注入到半导体衬底中作为邻接下面的氧化物层的n型区域。 n +型离子以n +型区域第四次注入n型区域。 p +型离子被第五次注入p型场作为p +型区域。 对n +型区域和p +型区域进行退火以完成半导体传感器装置。