公开(公告)号：US20070222010A1

公开(公告)日：2007-09-27

申请号：US11723907

申请日：2007-03-22

Applicant: Bruce C.S. Chou ,  Chen-Chih Fan

Inventor： Bruce C.S. Chou ,  Chen-Chih Fan

IPC: H01L29/84

CPC classification number: G06K9/00053 ,  Y10S977/701 ,  Y10S977/72 ,  Y10S977/721

Abstract: A semiconductor integrated circuit (IC) chip includes an IC chip body and a nano-structure-surface passivation film. The IC chip body has at least one surface. The nano-structure-surface passivation film is formed on the at least one surface. The nano-structure-surface passivation film including nano-particles and a carrier resin protects the IC chip body from encountering any external interference.

Abstract translation: 半导体集成电路（IC）芯片包括IC芯片体和纳米结构表面钝化膜。 IC芯片主体具有至少一个表面。 纳米结构表面钝化膜形成在至少一个表面上。 包括纳米颗粒和载体树脂的纳米结构表面钝化膜保护IC芯片体免受任何外部干扰。

公开(公告)号：US20070001249A1

公开(公告)日：2007-01-04

申请号：US11476027

申请日：2006-06-28

Applicant: Bruce Chou ,  Chen-Chih Fan

Inventor： Bruce Chou ,  Chen-Chih Fan

IPC: H01L29/82 ,  H01L27/14

CPC classification number: G06K9/0002 ,  G06K9/00026

Abstract: A structure of sweep-type fingerprint sensing chip capable of resisting electrostatic discharge (ESD) includes a semiconductor substrate, and a sweep-type fingerprint sensing chip formed on the semiconductor substrate, a polymer layer and a conducting metal layer. The sweep-type fingerprint sensing chip includes a sensing array region and a peripheral circuit region. The sensing array region has an exposed area for sensing a plurality of fingerprint fragment images as a finger sweeps thereacross. The peripheral circuit region, which is formed on the substrate and located around the sensing array region, controls an operation of the sensing array region. The polymer layer is disposed on the peripheral circuit region and has a flat and smooth outer surface. The conducting metal layer is disposed on the flat and smooth outer surface of the polymer layer. The conducting metal layer discharges the approaching electrostatic charges to the ground to avoid damaging of the sensing chip.

Abstract translation: 能够抵抗静电放电（ESD）的扫描式指纹感测芯片的结构包括半导体衬底和形成在半导体衬底，聚合物层和导电金属层上的扫描型指纹感测芯片。 扫描型指纹感测芯片包括感测阵列区域和外围电路区域。 感测阵列区域具有用于感测多个指纹片段图像的暴露区域，作为手指在其上扫描。 形成在基板上并位于感测阵列区域周围的外围电路区域控制感测阵列区域的操作。 聚合物层设置在外围电路区域上，具有平坦且光滑的外表面。 导电金属层设置在聚合物层的平坦光滑的外表面上。 导电金属层将接近的静电电荷排放到地面以避免损坏感测芯片。

公开(公告)号：US20130277771A1

公开(公告)日：2013-10-24

申请号：US13452037

申请日：2012-04-20

Applicant: Bruce C.S. Chou ,  Jung-Kuo Tu ,  Chen-Chih Fan

Inventor： Bruce C.S. Chou ,  Jung-Kuo Tu ,  Chen-Chih Fan

IPC: H01L29/84 ,  H01L21/02

CPC classification number: B81C1/00158 ,  B81C1/00301 ,  G01P15/125 ,  H01G5/18 ,  H01L28/60

Abstract: A device includes a semiconductor substrate, and a capacitive sensor having a back-plate, wherein the back-plate forms a first capacitor plate of the capacitive sensor. The back-plate is a portion of the semiconductor substrate. A conductive membrane is spaced apart from the semiconductor substrate by an air-gap. A capacitance of the capacitive sensor is configured to change in response to a movement of the polysilicon membrane.

公开(公告)号：US20050110051A1

公开(公告)日：2005-05-26

申请号：US10989510

申请日：2004-11-17

Applicant: Bruce Chou ,  Hsien-Ming Wu ,  Chen-Chih Fan

Inventor： Bruce Chou ,  Hsien-Ming Wu ,  Chen-Chih Fan

IPC: G01B7/28 ,  B81B3/00 ,  B81C1/00 ,  H01L21/312 ,  H01L29/768 ,  H01L29/84

CPC classification number: H01L21/3127 ,  B81B3/0005 ,  B81C1/0096 ,  B81C2201/112 ,  H01L21/0212 ,  H01L21/02282

Abstract: A surface processing method for a chip device includes the steps of: (a) providing a chip body having at least one exposed surface; (b) applying a polymeric monomer solution having a plurality of monomers to the at least one surface of the chip body, wherein each of the monomers has a soft fragment fluorocarbon (FC) polymer end and a polar silane group; and (c) curing the polymeric monomer solution to remove solvents out under proper environment settings, and to polymerize the monomers into a solid polymer layer on the at least one surface. The solid polymer layer thus has an exposed surface having a soft fragment FC polymer structure for protecting the chip body from encountering any external or internal interference.

Abstract translation: 芯片器件的表面处理方法包括以下步骤：（a）提供具有至少一个暴露表面的芯片体; （b）将具有多个单体的聚合单体溶液施加到芯片体的至少一个表面，其中每个单体具有软碎片碳氟化合物（FC）聚合物末端和极性硅烷基团; 和（c）固化聚合单体溶液以在适当的环境设置下除去溶剂，并将单体聚合成至少一个表面上的固体聚合物层。 因此，固体聚合物层具有具有软碎片FC聚合物结构的暴露表面，用于保护芯片体免受任何外部或内部干扰。

公开(公告)号：US20130277777A1

公开(公告)日：2013-10-24

申请号：US13450223

申请日：2012-04-18

Applicant: Chang-Chia Chang ,  Chen-Chih Fan ,  Bruce C.S. Chou

Inventor： Chang-Chia Chang ,  Chen-Chih Fan ,  Bruce C.S. Chou

IPC: H01L21/58 ,  H01L29/84

CPC classification number: B81C1/00269 ,  B81B3/0018 ,  B81B3/0067 ,  B81B3/007 ,  B81B7/00 ,  B81B7/0006 ,  B81B7/0016 ,  B81B7/0029 ,  B81B7/0041 ,  B81B7/0051 ,  B81B7/0058 ,  B81B2201/0228 ,  B81B2201/0235 ,  B81B2201/025 ,  B81B2207/07 ,  B81B2207/096 ,  B81C1/00 ,  B81C1/00293 ,  B81C1/00325 ,  B81C2203/0118

Abstract: A microelectromechanical system (MEMS) device may include a MEMS structure above a first substrate. The MEMS structure comprising a central static element, a movable element, and an outer static element. A portion of bonding material between the central static element and the first substrate. A second substrate above the MEMS structure, with a portion of a dielectric layer between the central static element and the second substrate. A supporting post comprises the portion of bonding material, the central static element, and the portion of dielectric material.

Abstract translation: 微机电系统（MEMS）装置可以包括在第一衬底上方的MEMS结构。 MEMS结构包括中心静态元件，可移动元件和外部静态元件。 在中心静电元件和第一衬底之间的一部分接合材料。 在MEMS结构上方的第二衬底，在中心静态元件和第二衬底之间具有介电层的一部分。 支撑柱包括接合材料部分，中心静电元件和介电材料部分。

公开(公告)号：US20050264615A1

公开(公告)日：2005-12-01

申请号：US10890121

申请日：2004-07-14

Applicant: Bruce Chou ,  Chih-Hsien Yeh ,  Chingfu Tsou ,  Jer-Wei Chang ,  Chen-Chih Fan

Inventor： Bruce Chou ,  Chih-Hsien Yeh ,  Chingfu Tsou ,  Jer-Wei Chang ,  Chen-Chih Fan

IPC: B41J2/05 ,  B41J2/14 ,  B41J2/175

CPC classification number: B41J2/1412 ,  B41J2/1404 ,  B41J2/14137 ,  B41J2002/14387

Abstract: An ink-jet print head with a chamber sidewall heating mechanism includes a substrate, an insulation layer on the substrate, a main channel penetrating through the substrate, a plurality of V-shaped micro-channels each having a diverging end linking with the main channel and a converging end linking with an ink chamber on the insulation layer, and a nozzle plate with a plurality of orifices formed on the ink chamber. The V-shaped micro-channels are perpendicular to the main channel and parallel to and arranged on the insulation layer. Each chamber sidewall includes a heater structure to evaporate ink in the chamber to form a bubble, which pushes the ink in the chamber to eject from the orifice.

Abstract translation: 具有室侧壁加热机构的喷墨打印头包括基板，基板上的绝缘层，穿过基板的主通道，多个V形微通道，每个V形微通道具有与主通道连接的发散端 以及与绝缘层上的墨水室连接的会聚端和在墨水室上形成有多个孔的喷嘴板。 V形微通道垂直于主通道并平行并布置在绝缘层上。 每个室侧壁包括一个加热器结构，用于蒸发腔室中的墨水以形成气泡，该气泡推动腔室中的墨水从孔口喷出。

公开(公告)号：US20050231213A1

公开(公告)日：2005-10-20

申请号：US10825313

申请日：2004-04-16

Applicant: Bruce Chou ,  Wallace Cheng ,  Chen-Chih Fan

Inventor： Bruce Chou ,  Wallace Cheng ,  Chen-Chih Fan

IPC: G01R27/26 ,  G06K9/00

CPC classification number: G06K9/00053

Abstract: A chip-type sensor against ESD and stress damages and contamination interference includes a substrate structure and a protection layer covering over the substrate structure. The protection layer includes, from bottom to top, a first layer for providing a first stress against the substrate structure, a second layer for providing a second stress against the substrate structure, and a third layer for providing a third stress against the substrate structure. The first stress and the third stress belong to one of a tensile stress and a compressive stress, and the second stress belongs to the other of the tensile stress and the compressive stress.

Abstract translation: 防止ESD和应力损坏和污染干扰的芯片型传感器包括衬底结构和覆盖在衬底结构上的保护层。 保护层从底部到顶部包括用于提供针对衬底结构的第一应力的第一层，用于向衬底结构提供第二应力的第二层以及用于向衬底结构提供第三应力的第三层。 第一应力和第三应力属于拉伸应力和压应力之一，第二应力属于拉伸应力和压应力中的另一个。