公开(公告)号：US07941639B2

公开(公告)日：2011-05-10

申请号：US11481432

申请日：2006-07-05

申请人： Yannick Teglia ,  Pierre-Yvan Liardet ,  Alain Pomet

发明人： Yannick Teglia ,  Pierre-Yvan Liardet ,  Alain Pomet

IPC分类号： G06F9/30

CPC分类号： G06F21/77 ,  G06F11/0757 ,  G06F21/75 ,  G06Q20/341 ,  G07F7/082 ,  G07F7/084 ,  G07F7/1008

摘要： A method for protecting the execution of a main program against possible traps, including, on occurrence of an instruction from the main program, starting a time counter of a given count according to next instructions of the main program, and executing, once the counter has reached its count, at least one instruction of a secondary program from which the result of the main program depends.

摘要翻译： 一种用于保护主程序的执行免受可能的陷阱的方法，包括在发生来自主程序的指令时，根据主程序的下一个指令启动给定计数的时间计数器，一旦计数器具有 达到其计数，至少一个辅助程序的指令，主程序的结果从该程序所依赖。

公开(公告)号：US06362671B1

公开(公告)日：2002-03-26

申请号：US09771364

申请日：2001-01-26

申请人： Alexandre Malherbe ,  Fabrice Marinet ,  Alain Pomet

发明人： Alexandre Malherbe ,  Fabrice Marinet ,  Alain Pomet

IPC分类号： H03K501

摘要： A device for the regeneration of a clock signal from an external serial bus includes a ring oscillator and counter. The ring oscillator provides n phases of a clock signal. Of these n phases, one phase is used as a reference and is applied to the counter. It is thus possible to count the number of entire reference clock signal periods between a first pulse and a second pulse received from the bus. In reading the state of the phases in the oscillator upon reception of the second pulse, a determination is made for a current phase corresponding to the phase delay between the reference clock signal and the second pulse of the bus. By using a regeneration device that also includes a ring oscillator and a counter, it is possible to regenerate the clock signal of the bus with high precision.

公开(公告)号：US08195946B2

公开(公告)日：2012-06-05

申请号：US11402307

申请日：2006-04-11

申请人： Fabrice Romain ,  Alain Pomet

发明人： Fabrice Romain ,  Alain Pomet

IPC分类号： H04L9/32 ,  G06F11/30

CPC分类号： G06F21/52 ,  G06F21/77 ,  G06F21/79 ,  H04L9/004

摘要： A method and a circuit for checking the coherence between data read from a first area of a memory of a microcontroller and the address of these data, including calculating a current digital signature of the read data by a function also taking into account the address of these data in the memory, and checking the coherence between the current signature and a previously-recorded signature.

摘要翻译： 一种用于检查从微控制器的存储器的第一区域读取的数据与这些数据的地址之间的相干性的方法和电路，包括通过功能计算读取数据的当前数字签名，同时考虑到这些数据的地址 存储器中的数据，以及检查当前签名与之前记录的签名之间的一致性。

公开(公告)号：US08135129B2

公开(公告)日：2012-03-13

申请号：US11917347

申请日：2006-06-14

申请人： Yannick Teglia ,  Pierre-Yvan Liardet ,  Alain Pomet

发明人： Yannick Teglia ,  Pierre-Yvan Liardet ,  Alain Pomet

IPC分类号： H04L9/28 ,  G06F12/14 ,  H04L9/32

CPC分类号： G06F7/723 ,  G06F2207/7252 ,  H04L9/003

摘要： A method and a circuit for protecting a numerical quantity contained in an integrated circuit on a first number of bits, in a modular exponentiation computing of a data by the numerical quantity, including: selecting at least one second number included between the unit and said first number minus two; dividing the numerical quantity into at least two parts, a first part including, from the bit of rank null, a number of bits equal to the second number, a second part including the remaining bits; for each part of the quantity, computing a first modular exponentiation of said data by the part concerned and a second modular exponentiation of the result of the first by the FIG. 2 exponentiated to the power of the rank of the first bit of the part concerned; and computing the product of the results of the first and second modular exponentiations.

摘要翻译： 一种方法和电路，用于通过所述数字量对数据的模幂运算中的第一位数保护包含在集成电路中的数值，包括：选择包括在所述单元和所述第一位之间的至少一个第二数字 数减二; 将所述数值分为至少两部分，第一部分包括从所述位零位的比特数等于所述第二数目的第二部分，包括剩余比特的第二部分; 对于数量的每个部分，通过所涉及的部分计算所述数据的第一模幂运算，并且通过图1计算第一次的结果的第二模幂运算。 2指数与有关部分的第一位的等级的权力; 并计算第一和第二模幂指数的结果的乘积。

公开(公告)号：US07593258B2

公开(公告)日：2009-09-22

申请号：US11641550

申请日：2006-12-19

申请人： Pierre-Yvan Liardet ,  Yannick Teglia ,  Alain Pomet

发明人： Pierre-Yvan Liardet ,  Yannick Teglia ,  Alain Pomet

IPC分类号： G11C11/34

CPC分类号： G06F21/75 ,  G06F21/755 ,  G06F21/77

摘要： A method for protecting an integrated circuit, including at least one non-volatile memory, including the steps of detecting a possible disturbance in the flow of a program executed by the integrated circuit, modifying the value of a digital variable in a volatile storage element in case of a disturbance detection and, in a way independent in time from the detection, intervening upon the non-volatile memory according to the value of said variable.

摘要翻译： 一种用于保护包括至少一个非易失性存储器的集成电路的方法，包括以下步骤：检测由集成电路执行的程序的流动中可能的干扰，修改易失性存储元件中的数字变量的值 干扰检测的情况，并且以与检测不同的时间独立的方式，根据所述变量的值插入在非易失性存储器上。

公开(公告)号：US20070263859A1

公开(公告)日：2007-11-15

申请号：US11641940

申请日：2006-12-19

申请人： Yannick Teglia ,  Pierre-Yvan Liardet ,  Alain Pomet

发明人： Yannick Teglia ,  Pierre-Yvan Liardet ,  Alain Pomet

IPC分类号： H04L1/00

CPC分类号： H04L9/003

摘要： A method for protecting an execution, by an integrated circuit, of a ciphering and/or deciphering algorithm taking into account data and at least one valid key and performing several iterations of the same calculation, including at least one execution of an iteration with the valid key between several executions of the same iteration with the invalid keys obtained by applying at least one non-linear one-way function to the valid key.

摘要翻译： 一种用于保护由集成电路执行加密和/或解密算法的方法，该方法考虑数据和至少一个有效密钥并执行相同计算的多次迭代，包括至少一次执行具有有效的迭代 通过将至少一个非线性单向函数应用于有效密钥而获得的无效密钥的相同迭代的多个执行之间的关键。

公开(公告)号：US20070174622A1

公开(公告)日：2007-07-26

申请号：US11402307

申请日：2006-04-11

申请人： Fabrice Romain ,  Alain Pomet

发明人： Fabrice Romain ,  Alain Pomet

IPC分类号： G11C29/00

CPC分类号： G06F21/52 ,  G06F21/77 ,  G06F21/79 ,  H04L9/004

摘要： A method and a circuit for checking the coherence between data read from a first area of a memory of a microcontroller and the address of these data, including calculating a current digital signature of the read data by a function also taking into account the address of these data in the memory, and checking the coherence between the current signature and a previously-recorded signature.

摘要翻译： 一种用于检查从微控制器的存储器的第一区域读取的数据与这些数据的地址之间的相干性的方法和电路，包括通过功能计算读取数据的当前数字签名，同时考虑到这些数据的地址 存储器中的数据，以及检查当前签名与之前记录的签名之间的一致性。

公开(公告)号：US08588407B2

公开(公告)日：2013-11-19

申请号：US11640119

申请日：2006-12-15

申请人： Pierre-Yvan Liardet ,  Yannick Teglia ,  Alain Pomet

发明人： Pierre-Yvan Liardet ,  Yannick Teglia ,  Alain Pomet

IPC分类号： G06F21/00

CPC分类号： G06F7/723 ,  G06F2207/7261 ,  G06F2207/7271

摘要： A method and a circuit for protecting a digital quantity over a first number of bits, in an algorithm executing at least one modular exponentiation of data by the quantity, the steps including at least one squaring up and at least one multiplication and implementing, for each bit of the quantity, different calculation steps according to the state of the bit, a same number of multiplications being performed whatever the state of the bit and all the calculation steps using a multiplication being taken into account to calculate a final result.

摘要翻译： 一种用于在以数量执行数据至少一次模幂运算的算法中通过第一位数保护数字量的方法和电路，所述步骤包括至少一个平方和至少一个乘法和实现 位的数量，根据位的状态的不同的计算步骤，不管位的状态执行相同数量的乘法，并且考虑使用乘法的所有计算步骤来计算最终结果。

公开(公告)号：US07806319B2

公开(公告)日：2010-10-05

申请号：US11402650

申请日：2006-04-11

申请人： Fabrice Romain ,  Alain Pomet

发明人： Fabrice Romain ,  Alain Pomet

IPC分类号： G06K5/00 ,  G06K7/08 ,  G06K19/06

CPC分类号： G07F7/1008 ,  G06F21/75 ,  G06F21/77 ,  G06F21/79 ,  G06K19/073 ,  G06Q20/341 ,  G07F7/082 ,  H04L9/004

摘要： A method and a circuit for protecting an integrated circuit against an extraction of data read from at least one memory, comprising the steps of comparing each data word to be output from the integrated circuit with at least one value stored in this circuit, and generating an error signal in case of an identity between the value and the data waiting to be output.

摘要翻译： 一种用于保护集成电路以防止从至少一个存储器读取的数据的提取的方法和电路，包括以下步骤：将从集成电路输出的每个数据字与存储在该电路中的至少一个值进行比较， 在值和等待输出的数据之间存在身份的情况下的错误信号。

公开(公告)号：US07656979B2

公开(公告)日：2010-02-02

申请号：US11325233

申请日：2006-01-04

申请人： Robert Leydier ,  Alain Pomet

发明人： Robert Leydier ,  Alain Pomet

IPC分类号： H04L7/00

CPC分类号： H04L7/0337

摘要： A data communication device comprises an input circuit (DRTC) that converts external data (XDT) into internal data (IDT) on the basis of a sampling signal (SP). A synchronization circuit (SYNC) provides the sampling signal (SP) on the basis of an oscillator signal (OS) and a synchronization value (SV). The synchronization value (SV) is representative of a number of cycles of the oscillator signal (OS) contained within a time interval for a unit of external data. The synchronization value (SV) is an initial value (IV) during an initial synchronization phase and a measured value (MV) during a measurement-based synchronization phase. A control circuit (IFC) carries out a calibration step in which the initial value (IV) is a preprogrammed reset value (RV) and in which the measured value (MV) is stored as a calibration value (CV). The control circuit (IFC) applies the calibration value (CV) as the initial value (IV) in subsequent initial synchronization phases.

摘要翻译： 数据通信装置包括：基于采样信号（SP）将外部数据（XDT）转换为内部数据（IDT）的输入电路（DRTC）。 同步电路（SYNC）基于振荡器信号（OS）和同步值（SV）提供采样信号（SP）。 同步值（SV）表示包含在外部数据单位的时间间隔内的振荡器信号（OS）的周期数。 同步值（SV）是在初始同步阶段期间的初始值（IV）和基于测量的同步阶段期间的测量值（MV）。 控制电路（IFC）执行校准步骤，其中初始值（IV）是预编程的复位值（RV），其中测量值（MV）被存储为校准值（CV）。 控制电路（IFC）将校准值（CV）作为初始值（IV）应用于后续的初始同步阶段。