公开(公告)号：US20160260843A1

公开(公告)日：2016-09-08

申请号：US14409179

申请日：2014-05-24

Applicant: BOE TECHNOLOGY GROUP CO., LTD

Inventor： Seungjin CHOI ,  Heecheol KIM ,  Youngsuk SONG ,  Seongyeol YOO

IPC: H01L29/786 ,  H01L29/423 ,  H01L27/12

CPC classification number: H01L29/78633 ,  H01L27/1225 ,  H01L27/124 ,  H01L27/1288 ,  H01L29/42384 ,  H01L29/78648 ,  H01L29/7869 ,  H01L29/78696 ,  H01L2029/42388

Abstract: An array substrate and a manufacturing method thereof, a display device and a thin film transistor are provided. The method includes forming a pattern that includes an active layer, a pixel electrode and a data line on a base substrate; forming a pattern that includes a gate insulating layer and at least two gate via-holes therein, the at least two gate via-holes are located in regions in the gate insulating layer that correspond to outer surroundings of the active layer and do not overlap with areas where the pixel electrode and the data line are located; forming a pattern that includes a gate line and at least two gate electrodes, the at least two gate electrodes are connected to the gate line, and are provided in the at least two gate via-holes, respectively. With this method, the fabricating process and the fabricating cost are saved.

Abstract translation: 提供阵列基板及其制造方法，显示装置和薄膜晶体管。 该方法包括在基底基板上形成包括有源层，像素电极和数据线的图案; 在其中形成包括栅极绝缘层和至少两个栅极通孔的图案，所述至少两个栅极通孔位于栅极绝缘层中对应于有源层的外部周围的区域中，并且不与 像素电极和数据线所在的区域; 形成包括栅极线和至少两个栅电极的图案，所述至少两个栅电极连接到栅极线，并分别设置在所述至少两个栅极通孔中。 利用这种方法，节省了制造工艺和制造成本。

公开(公告)号：US20160091765A1

公开(公告)日：2016-03-31

申请号：US14362241

申请日：2013-10-12

Applicant: BOE TECHNOLOGY GROUP CO., LTD.

Inventor： Seungjin CHOI ,  Seongyeol YOO ,  Youngsuk SONG

IPC: G02F1/1343 ,  G02F1/1333 ,  H01L27/12 ,  G02F1/1368

CPC classification number: G02F1/134363 ,  G02F1/133345 ,  G02F1/13439 ,  G02F1/1368 ,  G02F2001/133357 ,  G03F7/00 ,  H01L21/77 ,  H01L27/12 ,  H01L27/1218 ,  H01L27/124 ,  H01L27/1248 ,  H01L27/1262 ,  H01L27/1288 ,  H01L29/42384 ,  H01L29/4908 ,  H01L29/78606 ,  H01L29/78636 ,  H01L29/7869

Abstract: An array substrate and a manufacturing method thereof and a display device are provided, and the array substrate comprises: a substrate (1); a thin film transistor, a passivation layer (5) and a transparent electrode (6), sequentially formed on the substrate, wherein a groove (51) is formed in an upper surface of the passivation layer (5), and the transparent electrode (6) is provided in the groove (51).

Abstract translation: 提供阵列基板及其制造方法和显示装置，阵列基板包括：基板（1）; 薄膜晶体管，钝化层（5）和透明电极（6），其顺序地形成在所述基板上，其中在所述钝化层（5）的上表面中形成有沟槽（51），并且所述透明电极 6）设置在凹槽（51）中。

公开(公告)号：US20160005869A1

公开(公告)日：2016-01-07

申请号：US14416227

申请日：2014-04-16

Applicant: BOE TECHNOLOGY GROUP CO., LTD.

Inventor： Ke WANG ,  Seongyeol YOO ,  Ce NING ,  Wei YANG

IPC: H01L29/786 ,  H01L21/4763 ,  H01L29/51 ,  H01L29/49 ,  H01L29/66 ,  H01L29/423

CPC classification number: H01L29/7869 ,  H01L21/47635 ,  H01L29/41733 ,  H01L29/42384 ,  H01L29/4908 ,  H01L29/513 ,  H01L29/518 ,  H01L29/66969 ,  H01L29/78606

Abstract: Provided are oxide thin-film transistor and display device employing the same, and method for manufacturing an oxide thin-film transistor array substrate. A source electrode and a drain electrode are located below an oxide active layer pattern, and a gate electrode is located below the source electrode and the drain electrode, and the gate insulating layer is located between the gate electrode and the source electrode/the drain electrode.

Abstract translation: 提供了氧化物薄膜晶体管和采用该氧化物薄膜晶体管的显示装置，以及制造氧化物薄膜晶体管阵列基板的方法。 源电极和漏极位于氧化物有源层图案的下方，栅电极位于源极和漏电极的下方，栅极绝缘层位于栅电极和源电极/漏电极之间 。

公开(公告)号：US20150303306A1

公开(公告)日：2015-10-22

申请号：US14406667

申请日：2014-04-18

Applicant: BOE TECHNOLOGY GROUP CO., LTD.

Inventor： Seungjin CHOI ,  Heecheol KIM ,  Youngsuk SONG ,  Seongyeol YOO

IPC: H01L29/786 ,  H01L29/66

CPC classification number: H01L29/7869 ,  H01L29/42384 ,  H01L29/66969 ,  H01L29/78603

Abstract: There are provided a thin film transistor and a manufacturing method thereof, an array substrate and a display device. The thin film transistor is formed on a base substrate, and includes a gate electrode, an active layer, a source electrode and a drain electrode, the gate electrode includes a first section, a second section and a third section, the first section and the third section correspond to locations of the source electrode and the drain electrode, respectively; the base substrate has two recesses formed therein, and the first section and the third section are situated in the two recesses, respectively; the first section and the third section are covered with a filling layer; the filling layer and the second section are covered with a gate insulating layer, the active layer, the source electrode and the drain electrode in sequence.

Abstract translation: 提供了薄膜晶体管及其制造方法，阵列基板和显示装置。 薄膜晶体管形成在基底基板上，并且包括栅电极，有源层，源电极和漏电极，栅电极包括第一部分，第二部分和第三部分，第一部分和 第三部分分别对应于源电极和漏电极的位置; 基底基板上形成有两个凹部，第一部分和第三部分分别位于两个凹部中; 第一部分和第三部分被填充层覆盖; 填充层和第二部分依次覆盖有栅极绝缘层，有源层，源电极和漏电极。

公开(公告)号：US20170174921A1

公开(公告)日：2017-06-22

申请号：US15118234

申请日：2015-12-29

Applicant: BOE TECHNOLOGY GROUP CO., LTD.

Inventor： Xiaolong HE ,  Qi YAO ,  Seongyeol YOO ,  Shi SHU ,  Zhanfeng CAO ,  Wei XU

IPC: C09D11/50 ,  C09D11/38 ,  C09D11/36 ,  C09K11/70 ,  C09K11/02 ,  C09K11/88 ,  C09K11/87 ,  C09K11/74 ,  C09D11/52 ,  H01L51/00

CPC classification number: H01B1/20 ,  C09D11/322 ,  C09D11/36 ,  C09D11/38 ,  C09D11/50 ,  C09D11/52 ,  C09K11/025 ,  C09K11/70 ,  C09K11/7492 ,  C09K11/876 ,  C09K11/883 ,  H01L51/0005 ,  H01L51/0052 ,  H01L51/006 ,  H01L51/0061 ,  H01L51/0067 ,  H01L51/0069 ,  H01L51/007 ,  H01L51/0072 ,  H01L51/502 ,  H01L51/5056 ,  H01L51/5072 ,  H01L51/56 ,  H01L2051/0063

Abstract: A quantum dot ink, a manufacturing method thereof and a quantum dot light emitting diode device are provided. The quantum dot ink includes a non-polar organic solvent, a surface tension modifier and a hydrophobic quantum dot, the quantum dot ink further includes a carrier transport material, wherein phase separation is present between the hydrophobic quantum dot and the carrier transport material. After completing ink-jet printing the quantum dot ink, phase separation occurs between the hydrophobic quantum dot and the carrier transport material. Thus, the two-layer structure of a hydrophobic quantum dot layer and a carrier transport material layer is formed through one process. Not only a quantum dot light emitting device is manufactured by the method of ink-jet printing, but also the operation is simplified, and the manufacturing cost of the quantum dot light emitting device is reduced.

公开(公告)号：US20160007015A1

公开(公告)日：2016-01-07

申请号：US14415651

申请日：2014-04-21

Applicant: BOE TECHNOLOGY GROUP CO., LTD.

Inventor： Heecheol KIM ,  Youngsuk SONG ,  Seongyeol YOO ,  Seungjin CHOI

IPC: H04N13/04 ,  G06T1/00 ,  G09G3/36 ,  G06T7/00 ,  G02B27/01 ,  H04N5/335

CPC classification number: H04N13/398 ,  G02B27/01 ,  G02B27/017 ,  G02B2027/0132 ,  G02B2027/0138 ,  G02B2027/014 ,  G02B2027/0178 ,  G02B2027/0187 ,  G06T1/0007 ,  G09G3/20 ,  G09G3/36 ,  H04N5/23293 ,  H04N5/335 ,  H04N13/344 ,  H04N2013/405

Abstract: The present invention provides an open head mount display device and a display method thereof, relates to the field of head mount display technology, and can solve technical problems (such as a tedious operation, a poor display effect, an inaccurate position of the display image or the like) of the open head mount display device in the prior art. The open head mount display device of the present invention comprises: a display unit for providing a display image to user's eyes; an image acquisition unit for acquiring an image of an external object; an image analysis unit for analyzing and determining a position of the external object relative to the user's eyes in accordance with the image acquired by the image acquisition unit; and an image adjusting unit for adjusting the display image in accordance with an analysis result of the image analysis unit.

Abstract translation: 本发明提供了一种开放式头戴式显示装置及其显示方法，涉及头戴式显示技术领域，并且可以解决技术问题（诸如繁琐的操作，显示效果差，显示图像的不准确的位置 或类似物）的开放式头戴式显示装置。 本发明的开放式头戴显示装置包括：用于向用户的眼睛提供显示图像的显示单元; 图像获取单元，用于获取外部对象的图像; 图像分析单元，用于根据由图像获取单元获取的图像分析和确定外部对象相对于用户的眼睛的位置; 以及图像调整单元，用于根据图像分析单元的分析结果调整显示图像。

公开(公告)号：US20150380433A1

公开(公告)日：2015-12-31

申请号：US14499210

申请日：2014-09-28

Applicant: BOE TECHNOLOGY GROUP CO., LTD.

Inventor： Heecheol KIM ,  Youngsuk SONG ,  Seongyeol YOO ,  Seungjin CHOI

IPC: H01L27/12 ,  H01L29/417 ,  H01L29/786

CPC classification number: H01L27/124 ,  H01L29/41733 ,  H01L29/4175 ,  H01L29/78669 ,  H01L29/78678 ,  H01L29/7869 ,  H01L29/78696

Abstract: The present invention provides a TFT, an array substrate and a display device. The TFT includes a gate electrode, a source electrode, a drain electrode, and a semiconductor layer. The source electrode and the drain electrode are arranged on different layers. The semiconductor layer is in electrical connection to the source electrode and the drain electrode, respectively; wherein, a region on the semiconductor layer which is corresponding to a region between the source electrode and the drain electrode is a channel region. The present invention also provides an array substrate and a display device comprising the on TFT.

Abstract translation: 本发明提供一种TFT，阵列基板和显示装置。 TFT包括栅电极，源电极，漏电极和半导体层。 源电极和漏极布置在不同的层上。 半导体层分别与源电极和漏电极电连接; 其中，所述半导体层上对应于所述源电极和所述漏电极之间的区域是沟道区。 本发明还提供一种阵列基板和包括TFT的显示装置。

公开(公告)号：US20150325603A1

公开(公告)日：2015-11-12

申请号：US14802241

申请日：2015-07-17

Applicant: BOE Technology Group Co., Ltd.

Inventor： Seungjin CHOI ,  Heecheol KIM ,  Youngsuk SONG ,  Seongyeol YOO

IPC: H01L27/12 ,  H01L21/3213 ,  H01L21/311

CPC classification number: H01L27/1259 ,  G02F1/133345 ,  G02F1/134309 ,  G02F1/134363 ,  G02F2001/134372 ,  G02F2001/134381 ,  G02F2201/124 ,  H01L21/31127 ,  H01L21/32133 ,  H01L27/1218 ,  H01L27/124 ,  H01L27/1248 ,  H01L27/3244

Abstract: An array substrate, a method for fabricating the same and a display device are disclosed. The array substrate comprises a plurality of gate lines and a plurality of data lines which intersect each other to define a plurality of pixel regions, each of the pixel regions comprises a thin film transistor and further comprises: a base substrate; more than one protrusion disposed apart from each other on the base substrate; a first electrode layer comprising at least one first electrode strip disposed in a gap between adjacent protrusions; a second electrode layer comprising at least one second electrode strip disposed on the protrusions.

Abstract translation: 公开了阵列基板，其制造方法和显示装置。 阵列基板包括多个栅极线和彼此相交以限定多个像素区域的多条数据线，每个像素区域包括薄膜晶体管，还包括：基底; 在基底基板上彼此分开布置的多于一个的突起; 第一电极层，包括设置在相邻突起之间的间隙中的至少一个第一电极条; 第二电极层，包括设置在突起上的至少一个第二电极条。

公开(公告)号：US20150303150A1

公开(公告)日：2015-10-22

申请号：US14406427

申请日：2014-04-21

Applicant: BOE TECHNOLOGY GROUP CO., LTD.

Inventor： Seungjin CHOI ,  Heecheol KIM ,  Youngsuk SONG ,  Seongyeol YOO

IPC: H01L23/552 ,  H01L27/12

CPC classification number: H01L23/552 ,  H01L21/77 ,  H01L27/12 ,  H01L27/124 ,  H01L27/1262 ,  H01L29/786 ,  H01L29/78633 ,  H01L2924/0002 ,  H01L2924/00

Abstract: An array substrate and manufacturing method thereof, and a display device are provided. The array substrate comprises a TFT, an isolating layer (M), a pixel electrode (12) and a via (Q) formed through the isolating layer (14). A drain (6) of the TFT is electrically connected with the pixel electrode (12) through the via (Q). A first light blocking layer (14a) is formed on the pixel electrode (12) inside the via (Q). In the array substrate of the present invention, display effect deterioration due to the light reflection on pixel electrode inside the via is avoided by forming the light blocking layer on the pixel electrode inside the via. At the same time, prior to manufacturing the light blocking layer, a barrier layer is formed first to guarantee no residual of light blocking layer will be left on the substrate, thereby improving display performance of the display device.

Abstract translation: 提供阵列基板及其制造方法以及显示装置。 阵列基板包括TFT，隔离层（M），像素电极（12）和通过隔离层（14）形成的通孔（Q）。 TFT的漏极（6）通过通孔（Q）与像素电极（12）电连接。 在通孔（Q）内部的像素电极（12）上形成第一遮光层（14a）。 在本发明的阵列基板中，通过在通孔内部的像素电极上形成遮光层，避免了通孔内的像素电极的光反射引起的显示效果劣化。 同时，在制造遮光层之前，首先形成阻挡层，以确保不会在基板上留下残留的遮光层，从而提高显示装置的显示性能。