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公开(公告)号:US20250081611A1
公开(公告)日:2025-03-06
申请号:US18579476
申请日:2022-09-23
Inventor: Chao LI , Liangwei ZHANG , Chunxu ZHANG , Liang CHEN , Wentao LU , Wei ZHANG , Hui LI
IPC: H01L27/12 , G02F1/1362 , G02F1/1368
Abstract: The present application discloses a display panel and a method of manufacturing a display panel. The display panel comprises a substrate and a signal line arranged on the substrate, wherein the substrate comprises at least one display area, each display area comprises a plurality of pixel areas and a spacing area located between any two adjacent pixel areas of the plurality of pixel areas, the signal line is located within the spacing area, wherein the display panel further comprises an organic film layer, the organic film layer is arranged on a side of the signal line away from the substrate, and an orthographic projection of the organic film layer on the substrate covers an orthographic projection of the signal line on the substrate.
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公开(公告)号:US20240280862A1
公开(公告)日:2024-08-22
申请号:US18024013
申请日:2022-04-26
Inventor: Yonggang ZHANG , Wei ZHANG , Chao LI , Xipeng WANG , Jilei GAO , Xin ZHOU , Benzhi XU , Qi LIU , Liangwei ZHANG , Xing ZHANG
IPC: G02F1/1343 , G02F1/13357 , H04N13/32 , H04N13/359 , H04N13/383
CPC classification number: G02F1/134327 , G02F1/133603 , H04N13/32 , H04N13/359 , H04N13/383
Abstract: The present disclosure provides a liquid crystal grating and a driving method therefor, and a three-dimensional (3D) display device. The liquid crystal grating includes: a first substrate; a second substrate, where the second substrate and the first substrate are oppositely arranged; a liquid crystal layer, where the liquid crystal layer is located between the first substrate and the second substrate; and a first transparent grating electrode layer located at a side, facing the liquid crystal layer, of the first substrate; where the first transparent grating electrode layer includes a plurality of first strip-shaped electrodes extending in a first direction and arranged at intervals in a second direction, and each of at least part of the first strip-shaped electrodes is divided in the first direction into at least two first strip-shaped sub-electrodes arranged independently.
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公开(公告)号:US20240118573A1
公开(公告)日:2024-04-11
申请号:US17768411
申请日:2021-03-09
Inventor: Wenbo DONG , Chaoyue WANG , Wei ZHANG , Chao LI
IPC: G02F1/13357 , F21V8/00
CPC classification number: G02F1/13362 , G02B6/0041
Abstract: An edge-lit backlight module (7) includes a light guide plate (71), at least one polarizer (72) and at least one light source (73). The light guide plate (71) has side faces (71a). A polarizer (72) is disposed opposite to a side face (71a) of the light guide plate (71). A light source (73) is disposed on a side of a polarizer (72) away from the light guide plate (71). The at least one polarizer (72) is configured to convert light emitted from a light source (73) disposed on a side of the polarizer away from the light guide plate to the light guide plate (71) into linearly polarized light.
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公开(公告)号:US20220299829A1
公开(公告)日:2022-09-22
申请号:US17515032
申请日:2021-10-29
Inventor: Jilei GAO , Wei ZHANG , Miao YU , Benzhi XU , Chao LI , Qi LIU , Xipeng WANG , Yonggang ZHANG
IPC: G02F1/1362
Abstract: A display panel and a display device are disclosed. The display panel includes a plurality of sub-pixels arranged in an array; gate line light shielding parts extending in a row direction are arranged on horizontal non-display areas between every two adjacent rows of sub-pixels; vertical non-display areas are arranged between every two sub-pixels adjacent in a row direction; at least one of the vertical non-display areas is provided with a vertical light shielding part, and the vertical light shielding part is configured to prevent two sub-pixels on two sides, in the row direction, of the vertical light shielding part from light leakage at a junction; and a gap is formed between the vertical light shielding part and each of two gate line light shielding parts adjacent to the vertical light shielding part.
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公开(公告)号:US20210151605A1
公开(公告)日:2021-05-20
申请号:US16642638
申请日:2019-03-04
Applicant: BOE TECHNOLOGY GROUP CO., LTD.
Inventor: Zhi WANG , Guangcai YUAN , Feng GUAN , Chen XU , Xueyong WANG , Jianhua DU , Chao LI , Lei CHEN
IPC: H01L29/786 , H01L29/66
Abstract: The present disclosure relates to a thin film transistor and a manufacturing method thereof. The thin film transistor includes a substrate, a first semiconductor layer, a gate dielectric layer, and a gate electrode sequentially stacked on the substrate, the first semiconductor layer has a first portion located in a channel region of the thin film transistor and a second portion in source/drain regions of the thin film transistor and located on both sides of the first portion, the second portion and first sub-portions of the first portion adjacent to the second portion include an amorphous semiconductor material, a second sub-portion of the first portion between the first sub-portions includes a polycrystalline semiconductor material, and a second semiconductor layer located in the source/drain regions and in contact with the second portion, wherein a conductivity of the second semiconductor layer is higher than a conductivity of the amorphous semiconductor material.
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公开(公告)号:US20210111200A1
公开(公告)日:2021-04-15
申请号:US16846888
申请日:2020-04-13
Applicant: BOE Technology Group Co., Ltd.
Inventor: Yupeng GAO , Guangcai YUAN , Feng GUAN , Zhi WANG , Jianhua DU , Zhaohui QIANG , Chao LI
IPC: H01L27/12 , H01L29/24 , H01L29/786 , H01L29/66
Abstract: The present disclosure discloses a method for preparing an array substrate, an array substrate and a display panel, wherein the method comprises: forming a buffer layer on a substrate in a first region and a second region, wherein the buffer layer has a groove located in the second region; forming a first indium oxide thin film on the buffer layer in the first region; forming a second indium oxide thin film in the groove; performing a reduction process on the second indium oxide thin film to obtain indium particles; forming an amorphous silicon thin film in the groove, and inducing the amorphous silicon of the amorphous silicon thin film to form microcrystalline silicon at a preset temperature by using the indium particles; and removing the indium particles in the microcrystalline silicon to form a microcrystalline silicon semiconductor layer of the microcrystalline silicon thin film transistor.
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公开(公告)号:US20240092628A1
公开(公告)日:2024-03-21
申请号:US18517694
申请日:2023-11-22
Applicant: BOE TECHNOLOGY GROUP CO., LTD.
Inventor: Xiaochen MA , Guangcai YUAN , Ce NING , Xin GU , Xiao ZHANG , Chao LI
CPC classification number: B81B1/002 , B01L3/502715 , B81C1/00071 , B01L2300/0645 , B81B2201/05 , B81B2203/0338 , B81C2201/0111 , B81C2201/036
Abstract: A micro-nano channel structure, a method for manufacturing the micro-nano channel structure, a sensor, a method for manufacturing the sensor, and a microfluidic device are provided. The micro-nano channel structure includes: a base substrate; a base layer, on the base substrate and including a plurality of protrusions; a channel wall layer, on a side of the plurality of the protrusions away from the base substrate, the channel wall layer has a micro-nano channel; a recessed portion is provided between adjacent protrusions of the plurality of the protrusions, an orthographic projection of the micro-nano channel on the base substrate is located within an orthographic projection of the recessed portion on the base substrate. The micro-nano channels have a high resolution or an ultra-high resolution, and have different sizes and shapes.
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公开(公告)号:US20220128751A1
公开(公告)日:2022-04-28
申请号:US17485126
申请日:2021-09-24
Inventor: Chao LI
IPC: F21V8/00
Abstract: A light-transmitting assembly of a display device, a signal indicator, and the display device are provided in the embodiments of the present disclosure. The light-transmitting assembly of the display device includes: a light-transmitting adjustment member including a plurality of first patterns, a light transmittance of each first pattern is less than a light transmittance of a region of the light-transmitting adjustment member other than the first pattern, and each light-shielding area ratio of the first patterns is a ratio of a sum of areas of all the first patterns in any one region of the light-transmitting adjustment member to an area of the any one region.
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公开(公告)号:US20210028315A1
公开(公告)日:2021-01-28
申请号:US16641078
申请日:2019-02-22
Applicant: BOE TECHNOLOGY GROUP CO., LTD.
Inventor: Zhaohui QIANG , Feng GUAN , Zhi WANG , Yupeng GAO , Yang LYU , Chao LI , Jianhua DU , Lei CHEN
IPC: H01L29/786 , H01L29/66 , H01L29/45 , H01L29/417
Abstract: The present disclosure provides a thin film transistor, a pixel structure, a display device, and a manufacturing method. The thin film transistor includes: a gate on the substrate; a gate insulating layer covering the gate and the substrate; a first support portion and a second support portion, which are provided on the gate insulating layer covering the substrate and located on both sides of the gate, wherein the first support portion is not connected to the second support portion; a semiconductor layer on the first support portion, the second support portion, and the gate insulating layer covering the gate; and a source and a drain respectively connected to the semiconductor layer. The first support portion and the second support portion are respectively configured to support the semiconductor layer.
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公开(公告)号:US20250085577A1
公开(公告)日:2025-03-13
申请号:US18580659
申请日:2022-07-25
Inventor: Xin ZHOU , Jiaqing LIU , Wei ZHANG , Jilei GAO , Chao LI , Liang MA , Xipeng WANG , Benzhi XU , Liangwei ZHANG , Xing ZHANG , Yonggang ZHANG
IPC: G02F1/1333 , G02F1/1335 , G02F1/1339 , G02F1/1362 , G02F1/1368 , H01L27/12
Abstract: A display panel includes an array substrate and a color filter substrate, where the color filter substrate includes a first substrate, spacer pillars, and color filter layers, each spacer pillar is in the spacing region, and each pixel region is provided with a color filter layer. Each spacer pillar includes at least one spacer layer each made of the same material as the color filter layer in one of the pixel regions. The array substrate includes a second substrate and a support layer, where the support layer is on a side of the second substrate facing the color filter substrate, and includes a body layer and a plurality of protrusions on a side of the body layer away from the second substrate, where each protrusion is each opposite to at least one of the spacer pillars. At least one of the spacer pillars is each supported on the corresponding protrusion.
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