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11.发明公开公开(公告)号：US20230335440A1
公开(公告)日：2023-10-19
申请号：US18307554
申请日：2023-04-26
申请人： Apple Inc.
发明人： Vidhya Ramachandran , Jun Zhai , Chonghua Zhong , Kunzhong Hu , Shawn Searles , Joseph T. DiBene, II , Mengzhi Pang
CPC分类号： H01L21/77 , H01L25/16 , H01L25/03 , H01L25/18 , H01L22/20 , H01L24/32 , H01L24/73 , H01L24/17 , H01L2924/1427 , H01L2924/1436 , H01L2924/19042 , H01L2924/1432 , H01L2924/19103 , H01L2224/12105 , H01L2224/1703 , H01L2924/19104 , H01L2224/16265 , H01L2924/15192 , H01L2224/16235 , H01L2924/19041 , H01L2224/16227 , H01L2224/24195 , H01L2924/1433 , H01L2924/18162 , H01L2224/1403 , H01L2224/16145 , H01L2924/15311 , H01L2924/18161 , H01L2224/17181 , H01L2924/12 , H01L2924/1205 , H01L2924/1206
摘要： Systems that include integrated circuit dies and voltage regulator units are disclosed. Such systems may include a voltage regulator module and an integrated circuit mounted in a common system package. The voltage regulator module may include a voltage regulator circuit and one or more passive devices mounted to a common substrate, and the integrated circuit may include a System-on-a-chip. The system package may include an interconnect region that includes wires fabricated on multiple conductive layers within the interconnect region. At least one power supply terminal of the integrated circuit may be coupled to an output of the voltage regulator module via a wire included in the interconnect region.
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12.发明授权公开(公告)号：US11670548B2
公开(公告)日：2023-06-06
申请号：US17080609
申请日：2020-10-26
申请人： Apple Inc.
发明人： Vidhya Ramachandran , Jun Zhai , Chonghua Zhong , Kunzhong Hu , Shawn Searles , Joseph T. DiBene, II , Mengzhi Pang
CPC分类号： H01L21/77 , H01L22/20 , H01L24/32 , H01L24/73 , H01L25/03 , H01L25/16 , H01L25/18 , H01L24/17 , H01L2224/12105 , H01L2224/1403 , H01L2224/16145 , H01L2224/16227 , H01L2224/16235 , H01L2224/16265 , H01L2224/1703 , H01L2224/17181 , H01L2224/24195 , H01L2924/12 , H01L2924/1205 , H01L2924/1206 , H01L2924/1427 , H01L2924/1432 , H01L2924/1433 , H01L2924/1436 , H01L2924/15192 , H01L2924/15311 , H01L2924/18161 , H01L2924/18162 , H01L2924/19041 , H01L2924/19042 , H01L2924/19103 , H01L2924/19104
摘要： Systems that include integrated circuit dies and voltage regulator units are disclosed. Such systems may include a voltage regulator module and an integrated circuit mounted in a common system package. The voltage regulator module may include a voltage regulator circuit and one or more passive devices mounted to a common substrate, and the integrated circuit may include a System-on-a-chip. The system package may include an interconnect region that includes wires fabricated on multiple conductive layers within the interconnect region. At least one power supply terminal of the integrated circuit may be coupled to an output of the voltage regulator module via a wire included in the interconnect region.
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13.发明授权公开(公告)号：US10756622B2
公开(公告)日：2020-08-25
申请号：US16231904
申请日：2018-12-24
申请人： Apple Inc.
发明人： Sanjay Dabral , David A. Secker , Jun Zhai , Ralf M. Schmitt , Vidhya Ramachandran , Wenjie Mao
IPC分类号： H02M3/07 , G05F3/10 , H01L29/66 , H01L23/00 , H01L23/522
摘要： Power management systems are described. In an embodiment, a power management system includes a voltage source, a circuit load located within a chip, and a switched capacitor voltage regulator (SCVR) coupled to voltage source and the circuit load to receive an input voltage from the voltage source and supply an output voltage to the circuit load. The SCVR may include circuitry located within the chip and a discrete integrated passive device (IPD) connected to the chip.
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公开(公告)号：US09548288B1
公开(公告)日：2017-01-17
申请号：US14966482
申请日：2015-12-11
申请人： Apple Inc.
发明人： Vidhya Ramachandran , Chonghua Zhong , Shawn Searles , Jun Zhai , Young Doo Jeon , Huabo Chen
IPC分类号： H01L25/16 , H01L23/528 , H01L23/50 , H01L21/78 , H01L23/00 , H01L21/768 , H01L25/00
CPC分类号： H01L25/16 , H01L21/768 , H01L21/78 , H01L23/50 , H01L23/528 , H01L24/20 , H01L24/97 , H01L2224/12105 , H01L2224/16265 , H01L2224/97 , H01L2924/10253 , H01L2924/14 , H01L2924/1427 , H01L2924/1433 , H01L2924/1436 , H01L2924/1437 , H01L2924/145 , H01L2924/14511 , H01L2924/19011 , H01L2924/19041 , H01L2924/19042 , H01L2924/19104 , H01L2924/30107 , H01L2224/81
摘要： A system that includes an integrated circuit die and a power supply decoupling unit is disclosed. The system includes an integrated circuit die, and interconnection region, and a decoupling unit. The integrated circuit die includes a plurality of circuits, which each include multiple devices interconnected using wires fabricated on a first plurality of conductive layers. The interconnection region includes multiple solder balls, and multiple conductive paths, each of which includes wires fabricated on a second plurality conductive layers. At least one solder ball is connected to an Input/Output terminal of a first circuit of the plurality of circuits via one of the conductive paths. The decoupling unit may include a plurality of capacitors and a plurality of terminals. Each terminal of the decoupling unit may be coupled to a respective power terminal of a second circuit of the plurality of circuits via the conductive paths.
摘要翻译： 公开了一种包括集成电路管芯和电源去耦单元的系统。 该系统包括集成电路管芯和互连区域以及去耦单元。 集成电路管芯包括多个电路，每个电路包括使用在第一多个导电层上制造的导线互连的多个器件。 互连区域包括多个焊球，以及多个导电路径，每个导电路径包括制造在第二多个导电层上的导线。 至少一个焊球通过导电路径之一连接到多个电路中的第一电路的输入/输出端子。 去耦单元可以包括多个电容器和多个端子。 去耦单元的每个端子可以经由导电路径耦合到多个电路中的第二电路的相应电源端子。
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15.发明授权公开(公告)号：US11967528B2
公开(公告)日：2024-04-23
申请号：US18307554
申请日：2023-04-26
申请人： Apple Inc.
发明人： Vidhya Ramachandran , Jun Zhai , Chonghua Zhong , Kunzhong Hu , Shawn Searles , Joseph T. DiBene, II , Mengzhi Pang
CPC分类号： H01L21/77 , H01L22/20 , H01L24/32 , H01L24/73 , H01L25/03 , H01L25/16 , H01L25/18 , H01L24/17 , H01L2224/12105 , H01L2224/1403 , H01L2224/16145 , H01L2224/16227 , H01L2224/16235 , H01L2224/16265 , H01L2224/1703 , H01L2224/17181 , H01L2224/24195 , H01L2924/12 , H01L2924/1205 , H01L2924/1206 , H01L2924/1427 , H01L2924/1432 , H01L2924/1433 , H01L2924/1436 , H01L2924/15192 , H01L2924/15311 , H01L2924/18161 , H01L2924/18162 , H01L2924/19041 , H01L2924/19042 , H01L2924/19103 , H01L2924/19104
摘要： Systems that include integrated circuit dies and voltage regulator units are disclosed. Such systems may include a voltage regulator module and an integrated circuit mounted in a common system package. The voltage regulator module may include a voltage regulator circuit and one or more passive devices mounted to a common substrate, and the integrated circuit may include a System-on-a-chip. The system package may include an interconnect region that includes wires fabricated on multiple conductive layers within the interconnect region. At least one power supply terminal of the integrated circuit may be coupled to an output of the voltage regulator module via a wire included in the interconnect region.
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公开(公告)号：US20240038689A1
公开(公告)日：2024-02-01
申请号：US18485709
申请日：2023-10-12
申请人： Apple Inc.
IPC分类号： H01L23/00 , H01L21/78 , H01L23/58 , H01L23/544
CPC分类号： H01L23/562 , H01L21/78 , H01L23/564 , H01L23/585 , H01L23/544 , H01L2223/5446
摘要： Chip sealing structures and methods of manufacture are described. In an embodiment, a chip structure includes a main body area formed of a substrate, a back-end-of-the-line (BEOL) build-up structure spanning over the substrate, and chip edge sidewalls extending from a back surface of the substrate to a top surface of the BEOL build-up structure and laterally surrounding the substrate and the BEOL build-up structure. In accordance with embodiments, the chip structure may further include a conformal sealing layer covering at least a first chip edge sidewall of the chip edge sidewalls and a portion of the top surface of the BEOL build-up structure, and forming a lip around the top surface of the BEOL build-up structure.
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公开(公告)号：US11824015B2
公开(公告)日：2023-11-21
申请号：US17397834
申请日：2021-08-09
申请人： Apple Inc.
IPC分类号： H01L23/00 , H01L21/78 , H01L23/58 , H01L23/544
CPC分类号： H01L23/562 , H01L21/78 , H01L23/544 , H01L23/564 , H01L23/585 , H01L2223/5446
摘要： Chip sealing structures and methods of manufacture are described. In an embodiment, a chip structure includes a main body area formed of a substrate, a back-end-of-the-line (BEOL) build-up structure spanning over the substrate, and chip edge sidewalls extending from a back surface of the substrate to a top surface of the BEOL build-up structure and laterally surrounding the substrate and the BEOL build-up structure. In accordance with embodiments, the chip structure may further include a conformal sealing layer covering at least a first chip edge sidewall of the chip edge sidewalls and a portion of the top surface of the BEOL build-up structure, and forming a lip around the top surface of the BEOL build-up structure.
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18.发明授权公开(公告)号：US11699949B2
公开(公告)日：2023-07-11
申请号：US17383983
申请日：2021-07-23
申请人： Apple Inc.
发明人： Sanjay Dabral , David A. Secker , Jun Zhai , Ralf M. Schmitt , Vidhya Ramachandran , Wenjie Mao
IPC分类号： H02M3/07 , G05F3/10 , H01L29/66 , H01L23/00 , H01L23/522
CPC分类号： H02M3/07 , G05F3/10 , H01L23/5223 , H01L23/5227 , H01L24/17 , H01L29/66181 , H01L2224/02379
摘要： Power management systems are described. In an embodiment, a power management system includes a voltage source, a circuit load located within a chip, and a switched capacitor voltage regulator (SCVR) coupled to voltage source and the circuit load to receive an input voltage from the voltage source and supply an output voltage to the circuit load. The SCVR may include circuitry located within the chip and a discrete integrated passive device (IPD) connected to the chip.
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公开(公告)号：US11069665B2
公开(公告)日：2021-07-20
申请号：US16205679
申请日：2018-11-30
申请人： Apple Inc.
发明人： Vidhya Ramachandran , Chonghua Zhong , Jun Zhai , Long Huang , Mengzhi Pang , Rohan U. Mandrekar
IPC分类号： H01L25/16 , G01R31/64 , H01L23/525 , H01L21/66 , H01L49/02
摘要： Integrated passive devices (IPDs), electronic packaging structures, and methods of testing IPDs are described. In an embodiment, an electronic package structure includes an IPD with an array of capacitor banks that are electrically separate in the IPD, and a package routing that includes an interconnect electrically connected to an IC and a plurality of the capacitor banks in parallel.
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20.发明申请公开(公告)号：US20210043511A1
公开(公告)日：2021-02-11
申请号：US17080609
申请日：2020-10-26
申请人： Apple Inc.
发明人： Vidhya Ramachandran , Jun Zhai , Chonghua Zhong , Kunzhong Hu , Shawn Searles , Joseph T. DiBene, II , Mengzhi Pang
摘要： Systems that include integrated circuit dies and voltage regulator units are disclosed. Such systems may include a voltage regulator module and an integrated circuit mounted in a common system package. The voltage regulator module may include a voltage regulator circuit and one or more passive devices mounted to a common substrate, and the integrated circuit may include a System-on-a-chip. The system package may include an interconnect region that includes wires fabricated on multiple conductive layers within the interconnect region. At least one power supply terminal of the integrated circuit may be coupled to an output of the voltage regulator module via a wire included in the interconnect region.
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