Transistor Aging Reversal Using Hot Carrier Injection

    公开(公告)号:US20220103169A1

    公开(公告)日:2022-03-31

    申请号:US17399760

    申请日:2021-08-11

    Applicant: Apple Inc.

    Abstract: Embodiments relate to circuit for reversing a threshold voltage shift of a transistor. The circuit includes a current mirror for sensing a transistor current and generating a mirrored current corresponding to the sensed transistor current, a gate biasing module for providing a gate bias to the transistor, and a calibration engine configured to receive the mirrored current from the current mirror and to control the gate biasing module in response to determining whether the mirrored current is outside of a predetermined range indicative of a shift in the threshold voltage of the transistor. The gate biasing module includes a gate biasing circuit configured to operate the transistor in a region where hot carrier injection (HCI) is present, and a gate switch for coupling the gate biasing circuit to a gate terminal of the transistor.

    EXTENDING BANDWIDTH OF ANALOG CIRCUITS USING FERROELECTRIC NEGATIVE CAPACITORS

    公开(公告)号:US20220103135A1

    公开(公告)日:2022-03-31

    申请号:US17033008

    申请日:2020-09-25

    Applicant: Apple Inc.

    Abstract: Embodiments relate to a circuit implementation for extending the bandwidth of an amplifier. The extended bandwidth amplifier includes an amplifier coupled between an input node and an output node of the extended bandwidth amplifier. The amplifier has an input capacitance and an output capacitance. The extended bandwidth amplifier additionally includes a first digitally-trimmable negative-capacitance capacitor coupled between the input node of the extended bandwidth amplifier and a power supply terminal. The digitally-trimmable negative-capacitance capacitor includes a first branch, a second branch, and a controller. The first branch includes a first capacitor having a first negative capacitance, and a first switch. The second branch includes a second capacitor having a second negative capacitance, and a second switch. The controller is configured to turn on the first switch and the second switch based on the input capacitance of the amplifier.

    Wireless Amplifier Circuitry for Carrier Aggregation

    公开(公告)号:US20220085840A1

    公开(公告)日:2022-03-17

    申请号:US17477215

    申请日:2021-09-16

    Applicant: Apple Inc.

    Abstract: An electronic device may include wireless circuitry with a baseband processor, a transceiver circuit, a front-end module, and an antenna. The front-end module may include amplifier circuitry such as a low noise amplifier for amplifying received radio-frequency signals. The low noise amplifier is operable in a non-carrier-aggregation (NCA) mode and a carrier aggregation (CA) mode. The low noise amplifier may include a first input stage, a second input stage, a complementary degeneration transformer, and an input impedance compensation circuit. During the NCA mode, the first input stage is turned on while the second input stage is turned off, the degeneration transformer is controlled to provide maximum inductance, and the compensation circuit is turned on to provide input matching. During the CA mode, the first and second input stages are turned on, the degeneration transformer is adjusted to provide less inductance, and the compensation circuit is turned off.

    Wireless amplifier circuitry for carrier aggregation

    公开(公告)号:US11159191B1

    公开(公告)日:2021-10-26

    申请号:US17019037

    申请日:2020-09-11

    Applicant: Apple Inc.

    Abstract: An electronic device may include wireless circuitry with a baseband processor, a transceiver circuit, a front-end module, and an antenna. The front-end module may include amplifier circuitry such as a low noise amplifier for amplifying received radio-frequency signals. The low noise amplifier is operable in a non-carrier-aggregation (NCA) mode and a carrier aggregation (CA) mode. The low noise amplifier may include a first input stage, a second input stage, a complementary degeneration transformer, and an input impedance compensation circuit. During the NCA mode, the first input stage is turned on while the second input stage is turned off, the degeneration transformer is controlled to provide maximum inductance, and the compensation circuit is turned on to provide input matching. During the CA mode, the first and second input stages are turned on, the degeneration transformer is adjusted to provide less inductance, and the compensation circuit is turned off.

    Local Oscillator Driver Circuitry with Second Harmonic Rejection

    公开(公告)号:US20240333333A1

    公开(公告)日:2024-10-03

    申请号:US18742280

    申请日:2024-06-13

    Applicant: Apple Inc.

    CPC classification number: H04B1/403 H03D7/1466 H03L7/099 H03M1/66

    Abstract: An electronic device may include wireless circuitry having a mixer configured to receive an oscillating signal from oscillator circuitry. The oscillator circuitry can include a chain of buffer circuits referred to as oscillator driver circuitry. Transformers may be coupled at the input and output of each buffer circuit in the chain. Adjustable biasing circuits may be coupled at the input of a selected buffer circuit in the chain. The adjustable biasing circuits can be digital-to-analog converters (DACs) configured to apply a differential direct current (DC) offset voltage to the input of the selected buffer circuit. The differential DC offset voltage can have a value that minimizes a second harmonic component of the oscillator driver circuitry.

    Local Oscillator Driver Circuitry with Second Harmonic Rejection

    公开(公告)号:US20240039576A1

    公开(公告)日:2024-02-01

    申请号:US17877503

    申请日:2022-07-29

    Applicant: Apple Inc.

    CPC classification number: H04B1/403 H03D7/1466 H03L7/099 H03M1/66

    Abstract: An electronic device may include wireless circuitry having a mixer configured to receive an oscillating signal from oscillator circuitry. The oscillator circuitry can include a chain of buffer circuits sometimes referred to as oscillator driver circuitry. Transformers may be coupled at the input and output of each buffer circuit in the chain. Adjustable biasing circuits may be formed at the input of a selected buffer circuit in the chain of the buffer circuits. The adjustable biasing circuits can be digital-to-analog converters (DACs). The adjustable biasing circuits may be configured to apply a differential direct current (DC) offset voltage to the input of the selected buffer circuit. The differential DC offset voltage can have a value chosen to minimize a second harmonic component of the oscillator driver circuitry. Configured and operated in this way, a second harmonic conversion gain of the mixer can be reduced and can improve the transmit and receive performance of the wireless circuitry.

    Wireless amplifier circuitry for carrier aggregation

    公开(公告)号:US11711105B2

    公开(公告)日:2023-07-25

    申请号:US17477215

    申请日:2021-09-16

    Applicant: Apple Inc.

    Abstract: An electronic device may include wireless circuitry with a baseband processor, a transceiver circuit, a front-end module, and an antenna. The front-end module may include amplifier circuitry such as a low noise amplifier for amplifying received radio-frequency signals. The low noise amplifier is operable in a non-carrier-aggregation (NCA) mode and a carrier aggregation (CA) mode. The low noise amplifier may include a first input stage, a second input stage, a complementary degeneration transformer, and an input impedance compensation circuit. During the NCA mode, the first input stage is turned on while the second input stage is turned off, the degeneration transformer is controlled to provide maximum inductance, and the compensation circuit is turned on to provide input matching. During the CA mode, the first and second input stages are turned on, the degeneration transformer is adjusted to provide less inductance, and the compensation circuit is turned off.

    Amplifier circuitry for carrier aggregation

    公开(公告)号:US11664844B2

    公开(公告)日:2023-05-30

    申请号:US17948855

    申请日:2022-09-20

    Applicant: Apple Inc.

    Abstract: An electronic device may include wireless circuitry with a baseband processor, a transceiver circuit, a front-end module, and an antenna. The front-end module may include amplifier circuitry such as a low noise amplifier for amplifying received radio-frequency signals. The amplifier circuitry is operable in a non-carrier-aggregation mode and a carrier aggregation mode. The amplifier circuitry may include an input transformer that is coupled to multiple amplifier stages such as a common gate amplifier stage, a cascode amplifier stage, and a common source amplifier stage. The common gate amplifier stage may include switches for selectively activating a set of cross-coupled capacitors to help maintain input impedance matching in the non-carrier-aggregation mode and the carrier-aggregation mode. The common source amplifier stage may include additional switches for activating and deactivating the common source amplifier stage to help maintain the gain in the non-carrier-aggregation mode and the carrier-aggregation mode.

    Amplifier Circuitry for Carrier Aggregation

    公开(公告)号:US20220094313A1

    公开(公告)日:2022-03-24

    申请号:US17341159

    申请日:2021-06-07

    Applicant: Apple Inc.

    Abstract: An electronic device may include wireless circuitry with a baseband processor, a transceiver circuit, a front-end module, and an antenna. The front-end module may include amplifier circuitry such as a low noise amplifier for amplifying received radio-frequency signals. The amplifier circuitry is operable in a non-carrier-aggregation mode and a carrier aggregation mode. The amplifier circuitry may include an input transformer that is coupled to multiple amplifier stages such as a common gate amplifier stage, a cascode amplifier stage, and a common source amplifier stage. The common gate amplifier stage may include switches for selectively activating a set of cross-coupled capacitors to help maintain input impedance matching in the non-carrier-aggregation mode and the carrier-aggregation mode. The common source amplifier stage may include additional switches for activating and deactivating the common source amplifier stage to help maintain the gain in the non-carrier-aggregation mode and the carrier-aggregation mode.

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