Abstract:
Methods and apparatus for processing a substrate are provided herein. In some embodiments, a process chamber includes: a chamber body and a lid assembly defining a processing volume within the process chamber; a substrate support disposed within the processing volume to support a substrate; and a showerhead having a first surface including a plurality of gas distribution holes disposed opposite and parallel to the substrate support, wherein the showerhead is fabricated from aluminum and includes an aluminum oxide coating along the first surface, wherein the aluminum oxide coating has a thickness of about 0.0001 to about 0.002 inches. In some embodiments, the showerhead may further have at least one of a roughness of about 10 to about 300μ-in Ra, or an emissivity (ε) of about 0.20 to about 0.80. The process chamber may be a thermal atomic layer deposition (ALD) chamber.
Abstract:
Methods and apparatus for processing a substrate are provided herein. In some embodiments, a substrate processing chamber includes: a chamber body; a chamber lid assembly having a housing enclosing a central channel that extends along a central axis and has an upper portion and a lower portion; a lid plate coupled to the housing and having a contoured bottom surface that extends downwardly and outwardly from a central opening coupled to the lower portion of the central channel to a peripheral portion of the lid plate; and a gas distribution plate disposed below the lid plate and having a plurality of apertures disposed through the gas distribution plate.
Abstract:
Embodiments described herein provide a semiconductor device and methods and apparatuses of forming the same. The semiconductor device includes a substrate having a source and drain region and a gate electrode stack on the substrate between the source and drain regions. In one embodiment, the method includes positioning a substrate within a processing chamber, wherein the substrate includes a source and drain region, a gate dielectric layer between the source and drain regions, and a conductive film layer on the gate dielectric layer. The method also includes depositing a refractory metal nitride film layer on the conductive film layer, depositing a silicon-containing film layer on the refractory metal nitride film layer, and depositing a tungsten film layer on the silicon-containing film layer.