Built-in self-test circuit for liquid crystal display source driver
    11.
    发明授权
    Built-in self-test circuit for liquid crystal display source driver 有权
    内置自检电路,用于液晶显示源驱动

    公开(公告)号:US08810268B2

    公开(公告)日:2014-08-19

    申请号:US12764346

    申请日:2010-04-21

    Abstract: A built-in self-test (BIST) circuit for a liquid crystal display (LCD) source driver includes at least one digital-to-analog converter (DAC) and at least one buffer coupled to the respective DAC, wherein the buffer is reconfigurable as a comparator. A first input signal and a second input signal are coupled to the comparator. The first input signal is a predetermined reference voltage level. The second input signal is a test offset voltage in a test range.

    Abstract translation: 用于液晶显示器(LCD)源驱动器的内置自检(BIST)电路包括至少一个数模转换器(DAC)和耦合到相应DAC的至少一个缓冲器,其中缓冲器可重新配置 作为比较。 第一输入信号和第二输入信号耦合到比较器。 第一输入信号是预定的参考电压电平。 第二输入信号是测试范围内的测试偏移电压。

    MEMS modeling system and method
    12.
    发明授权
    MEMS modeling system and method 有权
    MEMS建模系统及方法

    公开(公告)号:US08762925B2

    公开(公告)日:2014-06-24

    申请号:US13029942

    申请日:2011-02-17

    Abstract: A system and method for modeling microelectromechanical devices is disclosed. An embodiment includes separating the microelectromechanical design into separate regions and modeling the separate regions separately. Parametric parameters or parametric equations may be utilized in the separate models. The separate models may be integrated into a MEMS device model. The MEMS device model may be tested and calibrated, and then may be used to model new designs for microelectromechanical devices.

    Abstract translation: 公开了一种用于对微机电装置进行建模的系统和方法。 一个实施例包括将微机电设计分离成单独的区域并分别对分开的区域进行建模。 参数化参数或参数方程可用于分开的模型。 单独的模型可以集成到MEMS器件模型中。 可以对MEMS器件模型进行测试和校准,然后可以用于为微机电器件的新设计建模。

    Buffer offset modulation
    13.
    发明授权
    Buffer offset modulation 有权
    缓冲偏移调制

    公开(公告)号:US08547259B1

    公开(公告)日:2013-10-01

    申请号:US13562509

    申请日:2012-07-31

    Abstract: One or more techniques for buffer offset modulation or buffer offset cancelling are provided herein. In an embodiment, an output for a sigma-delta analog digital converter (ADC) is provided using an output of a first chop-able buffer (FB) and an output of a second chop-able buffer (SB). For example, the output of the FB is associated with a first offset, the output of the SB is associated with a second offset, and the output of the ADC includes an ADC offset associated with the first offset and the second offset. In an embodiment, buffer offset modulation is provided by modulating the ADC offset using an offset rotation. In an example, the offset rotation is based at least in part on a reference clock and the output of the ADC. The buffer offset modulation mitigates the first offset or the second offset, where such offsets are generally undesired.

    Abstract translation: 本文提供了一种或多种用于缓冲器偏移调制或缓冲器偏移消除的技术。 在一个实施例中,使用第一斩波缓冲器(FB)的输出和第二可斩波缓冲器(SB)的输出来提供用于Σ-Δ模拟数字转换器(ADC)的输出。 例如,FB的输出与第一偏移相关联,SB的输出与第二偏移相关联,并且ADC的输出包括与第一偏移和第二偏移相关联的ADC偏移。 在一个实施例中,通过使用偏移旋转调制ADC偏移来提供缓冲器偏移调制。 在一个例子中,偏移旋转至少部分地基于参考时钟和ADC的输出。 缓冲器偏移调制减轻了第一偏移或第二偏移,其中这种偏移通常是不期望的。

    MEMS Modeling System and Method
    14.
    发明申请
    MEMS Modeling System and Method 有权
    MEMS建模系统与方法

    公开(公告)号:US20120215497A1

    公开(公告)日:2012-08-23

    申请号:US13029942

    申请日:2011-02-17

    Abstract: A system and method for modeling microelectromechanical devices is disclosed. An embodiment includes separating the microelectromechanical design into separate regions and modeling the separate regions separately. Parametric parameters or parametric equations may be utilized in the separate models. The separate models may be integrated into a MEMS device model. The MEMS device model may be tested and calibrated, and then may be used to model new designs for microelectromechanical devices.

    Abstract translation: 公开了一种用于对微机电装置进行建模的系统和方法。 一个实施例包括将微机电设计分离成单独的区域并分别对分开的区域进行建模。 参数化参数或参数方程可用于分开的模型。 单独的模型可以集成到MEMS器件模型中。 可以对MEMS器件模型进行测试和校准,然后可以用于为微机电器件的新设计建模。

    KNIFE CASE
    15.
    发明申请
    KNIFE CASE 审中-公开
    生锈案例

    公开(公告)号:US20120102759A1

    公开(公告)日:2012-05-03

    申请号:US12938607

    申请日:2010-11-03

    Inventor: JUI-CHENG HUANG

    CPC classification number: B26B29/025

    Abstract: A knife case is integrally molded to have a shape matching the blade of a knife, and includes a front end, a rear end, an upper edge, a lower edge, and two lateral sides. A rearward opened blade receiving space is defined on the knife case to extend from the rear end toward the front end, a thumb push is provided on the upper edge to project from the rear end, and a through hole is provided on the thumb push for a fastening strap to extend therethrough. With the knife case having the above structure, the knife received therein can be safely displayed for sale without the need of extra packaging material and a user can conveniently and safely remove the knife from the knife case for use.

    Abstract translation: 刀壳整体模制成具有与刀的刀片匹配的形状,并且包括前端,后端,上边缘,下边缘和两个侧面。 在刀壳上限定了向后开放的刀片容纳空间,从后端朝向前端延伸,在上边缘设置有从后端突出的拇指按压,并且在拇指推动件上设置有通孔 紧固带从其延伸穿过。 在具有上述结构的刀壳的情况下,容纳在其中的刀可以安全地显示出售,而不需要额外的包装材料,并且使用者可以方便和安全地将刀从刀盒中取出使用。

    Audio processing system for use in multi-channel audio chip
    16.
    发明授权
    Audio processing system for use in multi-channel audio chip 有权
    音频处理系统用于多声道音频芯片

    公开(公告)号:US07496417B2

    公开(公告)日:2009-02-24

    申请号:US10734257

    申请日:2003-12-15

    CPC classification number: H04S3/00

    Abstract: An audio processing system for used in a multi-channel audio chip includes a multiplexer, a digital-to-analog converter, a de-multiplexer, a controller and N sample-and-hold circuits. The multiplexer receives N digital signals and outputs the digital signals one by one in a time-division manner. The digital-to-analog converter receives the digital signals from the multiplexer and converts them into corresponding N analog signals. The de-multiplexer outputs the analog signals one by one in a time-division manner. The controller generates control signals to control the selection of the multiplexer and the de-multiplexer. The sample-and-hold circuits hold the analog signals for a predetermined period of time and then outputs the signals, respectively.

    Abstract translation: 用于多声道音频芯片的音频处理系统包括多路复用器,数模转换器,去多路复用器,控制器和N个采样和保持电路。 多路复用器接收N个数字信号并以时分方式逐个输出数字信号。 数模转换器从多路复用器接收数字信号并将其转换成相应的N个模拟信号。 解复用器以时分方式逐个输出模拟信号。 控制器产生控制信号以控制多路复用器和解复用器的选择。 采样保持电路将模拟信号保持预定的时间段,然后分别输出信号。

    Amplifier circuit
    17.
    发明授权
    Amplifier circuit 有权
    放大器电路

    公开(公告)号:US07138869B2

    公开(公告)日:2006-11-21

    申请号:US10748667

    申请日:2003-12-31

    CPC classification number: H03H11/126 H03H7/24

    Abstract: An amplifier circuit having a high time constant. An operational amplifier includes a non-converting input terminal coupled to a ground, a converting input terminal and an output terminal. A first resistor network including at least one stage is coupled between the converting input terminal and the output terminal. Each stage of the first resistor network includes a first node, a first current path and a second current path connected to the first node. The first current path of each stage of the first resistor network is connected to the first node of the next stage, the second current path of each stage of the first resistor network is grounded, and the first current path of the first stage of the first resistor network is connected to the converting input terminal. A loading unit is coupled between the converting input terminal and the output terminal.

    Abstract translation: 具有高时间常数的放大器电路。 运算放大器包括耦合到地的非转换输入端,转换输入端和输出端。 包括至少一个级的第一电阻网络耦合在转换输入端和输出端之间。 第一电阻网络的每个级包括连接到第一节点的第一节点,第一电流路径和第二电流路径。 第一电阻网络的每个级的第一电流路径连接到下一级的第一节点,第一电阻网络的每一级的第二电流路径接地,并且第一电阻网络的第一级的第一电流路径 电阻网络连接到转换输入端。 加载单元耦合在转换输入端和输出端之间。

    Phase-lock loop for preventing frequency drift and jitter and method thereof
    18.
    发明授权
    Phase-lock loop for preventing frequency drift and jitter and method thereof 有权
    用于防止频率漂移和抖动的锁相环及其方法

    公开(公告)号:US06844785B2

    公开(公告)日:2005-01-18

    申请号:US10459577

    申请日:2003-06-12

    CPC classification number: H03L7/18 H03L7/0996

    Abstract: A phase-lock loop for preventing frequency drift and jitter problems is disclosed. A phase comparator compares an input signal and a feedback signal, and outputs a control voltage according to phase difference therebetween. A voltage-controlled oscillator outputs a plurality of multiple phase oscillating signals according to the control voltage. A phase swallower receives a plurality of multiple phase oscillating signals, and generates a phase swallow signal. The phase swallow signal is formed by adding or removing one phase in the oscillating signal per predetermined number of clocks. An output frequency divider divides the frequency of the phase swallow signal so as to generate a desired output signal.

    Abstract translation: 公开了一种用于防止频率漂移和抖动问题的锁相环。 相位比较器比较输入信号和反馈信号,并根据它们之间的相位差输出控制电压。 压控振荡器根据控制电压输出多个多相振荡信号。 相位吞吐器接收多个多相振荡信号,并产生相位信号。 相位吞咽信号是通过在每个预定数量的时钟周期中在振荡信号中相加或去除一相而形成的。 输出分频器分频相位信号的频率,以产生期望的输出信号。

    FREQUENCY GENERATOR
    19.
    发明申请
    FREQUENCY GENERATOR 审中-公开
    频率发生器

    公开(公告)号:US20120187983A1

    公开(公告)日:2012-07-26

    申请号:US13009952

    申请日:2011-01-20

    CPC classification number: H03B21/01 H03B5/30

    Abstract: A mechanical frequency generator has a first mechanical resonator and a second mechanical resonator and a circuit connected with the first and second mechanical resonators. The first and second mechanical resonators having substantially the same resonator frequency coefficients as a function of an environment of the first and the second mechanical resonators. The first mechanical resonator differing in size from the second mechanical resonator. The circuit adapted to generate a difference frequency signal responsive to the first and second mechanical resonator frequency signals and based on the first and the second predetermined resonant frequencies.

    Abstract translation: 机械频率发生器具有第一机械谐振器和第二机械谐振器以及与第一和第二机械谐振器连接的电路。 第一和第二机械谐振器具有与第一和第二机械谐振器的环境的函数基本上相同的谐振器频率系数。 第一机械谐振器的尺寸与第二机械谐振器的尺寸不同。 该电路适于响应于第一和第二机械谐振器频率信号并基于第一和第二预定谐振频率产生差频信号。

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