公开(公告)号：US06750484B2

公开(公告)日：2004-06-15

申请号：US10234438

申请日：2002-08-30

申请人： Gunther Lippert ,  Hans-Jörg Osten ,  Bernd Heinemann

发明人： Gunther Lippert ,  Hans-Jörg Osten ,  Bernd Heinemann

IPC分类号： H01L310328

CPC分类号： H01L29/7378 ,  H01L21/02381 ,  H01L21/0245 ,  H01L21/02505 ,  H01L21/02532 ,  H01L29/161 ,  H01L29/165 ,  H01L29/66242

摘要： A silicon-germanium hetero bipolar transistor comprising a silicon collector layer, a boron-doped silicon-germanium base layer, a silicon emitter layer and an emitter contact area. The transistor is fabricated using an epitaxy process on a surface of pure silicon. An electrically inert material is incorporated into the epitaxial layers in order to link the defects in the semiconductor structure and to reduce the outdiffusion of the dopant. Thus, a transistor for high-frequency applications can be fabricated in two ways: to increase the dopant dose of the base region or to reduce the thickness of the base layer. In particular, carbon is incorporated in the base layer and in the collector layer and/or emitter layer.

摘要翻译： 一种硅 - 锗异质双极晶体管，包括硅集电极层，硼掺杂硅 - 锗基底层，硅发射极层和发射极接触区域。 晶体管使用在纯硅表面上的外延工艺制造。 为了连接半导体结构中的缺陷并减少掺杂剂的扩散，将电惰性材料结合到外延层中。 因此，用于高频应用的晶体管可以以两种方式制造：增加基极区域的掺杂剂剂量或减小基底层的厚度。 特别地，碳被并入基底层和集电极层和/或发射极层中。

公开(公告)号：US20120001192A1

公开(公告)日：2012-01-05

申请号：US12998869

申请日：2009-12-03

申请人： Alexander Fox ,  Bernd Heinemann ,  Steffen Marschmeyer

发明人： Alexander Fox ,  Bernd Heinemann ,  Steffen Marschmeyer

IPC分类号： H01L29/70 ,  H01L21/331

CPC分类号： H01L29/66242 ,  H01L21/8222 ,  H01L21/8249 ,  H01L29/0804 ,  H01L29/0817 ,  H01L29/0821 ,  H01L29/1004 ,  H01L29/161 ,  H01L29/66272 ,  H01L29/7322 ,  H01L29/7371

摘要： A semiconductor device, comprising a substrate layer made of a semiconductor material of a first conductivity type and having a first insulation region, and a vertical bipolar transistor having a first vertical portion of a collector made of monocrystalline semiconductor material of a second conductivity type and disposed in an opening of the first insulation region, a second insulation region lying partly on the first vertical portion of the collector and partly on the first insulation region and having an opening in the region of the collector, in which opening a second vertical portion of the collector made of monocrystalline material is disposed, said portion including an inner region of the second conductivity type, a base made of monocrystalline semiconductor material of the first conductivity type, a base connection region surrounding the base in the lateral direction, a T-shaped emitter made of semiconductor material of the second conductivity type and overlapping the base connection region, wherein the base connection region, aside from a seeding layer adjacent the substrate or a metallization layer adjacent a base contact, consists of a semiconductor material which differs in its chemical composition from the semiconductor material of the collector, the base and the emitter and in which the majority charge carriers of the first conductivity type have greater mobility compared thereto.

摘要翻译： 一种半导体器件，包括由第一导电类型的半导体材料制成并具有第一绝缘区域的衬底层和垂直双极晶体管，其具有由第二导电类型的单晶半导体材料制成的集电体的第一垂直部分，并且被布置 在第一绝缘区域的开口中，第二绝缘区域部分地位于集电器的第一垂直部分上并且部分地位于第一绝缘区域上并且在集电器的区域中具有开口，其中开口的第二垂直部分 设置由单晶材料构成的集电体，所述部分包括第二导电类型的内部区域，由第一导电类型的单晶半导体材料制成的基底，在横向方向上围绕基底的基极连接区域，T形发射极 由第二导电类型的半导体材料制成并与基底连接重叠 其中基底连接区域除了与基底相邻的晶种层或邻近基极接触处的金属化层组成，其半导体材料的化学成分不同于集电极，基极和发射极的半导体材料 并且其中第一导电类型的多数电荷载流子具有比其更大的迁移率。

公开(公告)号：US07777255B2

公开(公告)日：2010-08-17

申请号：US10580669

申请日：2004-12-03

申请人： Holger Rücker ,  Bernd Heinemann

发明人： Holger Rücker ,  Bernd Heinemann

IPC分类号： H01L31/072

CPC分类号： H01L29/66287 ,  H01L29/0649 ,  H01L29/1004 ,  H01L29/66242 ,  H01L29/732 ,  H01L29/7378

摘要： A bipolar transistor has a base with an epitaxial base layer and a raised base connection region which in a lateral direction in parallel relationship with the substrate surface encloses the emitter which is surrounded by a spacer of insulating material. The epitaxial base layer is raised in a heightwise direction perpendicularly to the substrate surface. An emitter of a T-shaped cross-sectional profile is separated laterally from the outer base portion by a spacer of insulating material. Its vertical bar of the T-shape adjoins with its lower end the inner base portion. The lateral extent of the spacer increases from its interface with respect to the base layer with increasing height above the base layer, wherein a first interface formed by the emitter and the spacer meets a second interface formed by the emitter and the inner base portion at a first angle which is either a right angle or an obtuse angle, and a third interface formed by the spacer and the outer base portion meets the second interface at a second obtuse angle which is larger than the first angle.

摘要翻译： 双极晶体管具有基底，其具有外延基底层和凸起的基底连接区域，该基底连接区域在与衬底表面平行的方向上包围由绝缘材料的隔离物围绕的发射器。 外延基层在与基板表面垂直的高度方向上升高。 通过绝缘材料的间隔件将T形横截面轮廓的发射器从外部基部侧向分开。 其T形的垂直杆的下端与内部基部相邻。 间隔物的横向范围从其相对于基底层的界面增加，其高度高于基底层，其中由发射体和间隔物形成的第一界面与由发射体和内部基底部分形成的第二界面在 第一角度是直角或钝角，并且由间隔件和外基部形成的第三界面以大于第一角度的第二钝角与第二界面相交。

公开(公告)号：US20100055880A1

公开(公告)日：2010-03-04

申请号：US12449335

申请日：2008-02-15

申请人： Bernd L. Tillack ,  Bernd Heinemann ,  Yuji Yamamoto

发明人： Bernd L. Tillack ,  Bernd Heinemann ,  Yuji Yamamoto

IPC分类号： H01L21/20

CPC分类号： C23C16/24 ,  C23C16/0272 ,  C23C16/04 ,  C23C16/28 ,  H01L21/02381 ,  H01L21/0245 ,  H01L21/02532 ,  H01L21/02595 ,  H01L21/0262 ,  H01L21/02639

摘要： A method of depositing polycrystalline silicon exclusively on monocrystalline first silicon surface portions of a substrate surface which besides the first surface portions additionally has insulator surface portions, comprising the steps of depositing boron on the first silicon surface portions in an amount which in relation to the first silicon surface portions respectively corresponds to more than a monolayer of boron, and depositing silicon on the first silicon surface portions treated in that way.

摘要翻译： 一种仅在基板表面的单晶第一硅表面部分上沉积多晶硅的方法，除了第一表面部分之外，还具有绝缘体表面部分，该方法包括以下步骤：在第一硅表面部分上沉积硼，其量相对于第一 硅表面部分分别对应于多于单层的硼，并且在以这种方式处理的第一硅表面部分上沉积硅。

公开(公告)号：US07595534B2

公开(公告)日：2009-09-29

申请号：US10433969

申请日：2001-12-06

申请人： Bernd Heinemann ,  Karl-Ernst Ehwald ,  Dieter Knoll ,  Bernd Tillack ,  Dirk Wolansky ,  Peter Schley

发明人： Bernd Heinemann ,  Karl-Ernst Ehwald ,  Dieter Knoll ,  Bernd Tillack ,  Dirk Wolansky ,  Peter Schley

IPC分类号： H01L29/76 ,  H01L29/94 ,  H01L31/062 ,  H01L31/113

CPC分类号： H01L21/74 ,  H01L21/26506 ,  H01L21/823807 ,  H01L21/823892 ,  H01L29/1083

摘要： The invention relates to layers in substrate wafers. The aim of the invention is to provide layers in substrate wafers with which the drawbacks of conventional assemblies are overcome in order to achieve, on the one hand, an adequate resistance to latch-up in highly scaled, digital CMOS circuits with comparatively low costs and, on the other hand, to ensure low substrate losses/couplings for analog high-frequency circuits and, in addition, to influence the component behavior in a non-destructive manner. To these ends, the invention provides that in a highly resistive p-Si substrate (2) with one or more buried high-carbon Si layers (3) under an epitaxial layer and with the Si cap layer (4), an implantation dose, which is greater in comparison to conventional substrate wafers, is used for retrograde trough profiles by suppressing the dopant diffusion as well as the generation of defects when remedying implant defects, thereby achieving a reduction of the trough resistance, and finally, an increase in the resistance to latch-up.

摘要翻译： 本发明涉及衬底晶片中的层。 本发明的目的是提供衬底晶片中的层，其中克服了常规组件的缺点，以便一方面实现具有相对较低成本的高度缩放的数字CMOS电路中的闩锁的适当电阻，以及 另一方面，为了确保模拟高频电路的低衬底损耗/耦合，此外，以非破坏性的方式影响组件行为。 为此，本发明提供了在具有一个或多个掩埋的高碳Si层（3）的外延层和Si覆盖层（4）下的高电阻p-Si衬底（2）中的注入剂量， 与传统的基板晶片相比，通过抑制掺杂剂扩散以及在补偿注入缺陷时产生缺陷而用于逆向槽型材，从而实现了谷电阻的降低，最后增加了电阻 闭锁

公开(公告)号：US07205188B2

公开(公告)日：2007-04-17

申请号：US10450006

申请日：2001-12-06

申请人： Dieter Knoll ,  Bernd Heinemann

发明人： Dieter Knoll ,  Bernd Heinemann

IPC分类号： H01L21/8238

CPC分类号： H01L21/8249

摘要： The invention relates to a method for producing high-speed vertical npn bipolar transistors and complementary MOS transistors on a chip. In order to produce these high-speed vertical npn bipolar transistors and complementary MOS transistors on a chip, all technological method steps for producing the vertical structure of the collector, base and emitter in the active region of the npn bipolar transistors as well as for laterally structuring the collector regions, base regions and emitter regions are performed before the troughs and the gate insulating layer for the MOS transistors are produced.

摘要翻译： 本发明涉及在芯片上制造高速垂直npn双极晶体管和互补MOS晶体管的方法。 为了在芯片上生产这些高速垂直npn双极晶体管和互补MOS晶体管，所有技术方法步骤用于在npn双极晶体管的有源区中产生集电极，基极和发射极的垂直结构以及横向 构成集电极区域之前，在产生用于MOS晶体管的槽和栅极绝缘层之前执行基极区域和发射极区域。

公开(公告)号：US20050023642A1

公开(公告)日：2005-02-03

申请号：US10496531

申请日：2002-12-02

申请人： Bernd Heinemann ,  Dieter Knoll ,  Karl-Ernst Ehwald ,  Holger Rucker

发明人： Bernd Heinemann ,  Dieter Knoll ,  Karl-Ernst Ehwald ,  Holger Rucker

IPC分类号： H01L21/331 ,  H01L29/08 ,  H01L29/732 ,  H01L29/737 ,  H01L21/8222

CPC分类号： H01L29/66287 ,  H01L29/0821 ,  H01L29/1004 ,  H01L29/7325

摘要： The semiconductor device according to the invention includes a substrate, a field insulating region which delimits an active region of the semiconductor substrate, a collector, at least one collector contact region associated with the collector, and a base with an associated base connection region. The collector and the collector contact region are formed in the same active region. In addition the base connection region extends partially over the active region and is separated from the surface of the active region by an insulator layer.

摘要翻译： 根据本发明的半导体器件包括衬底，限定半导体衬底的有源区域的场绝缘区域，集电极，与集电极相关联的至少一个集电极接触区域以及具有相关联的基极连接区域的基极。 集电极和集电极接触区形成在相同的有源区中。 此外，基极连接区部分地延伸在有源区上方并且通过绝缘体层与有源区的表面分离。

公开(公告)号：US07880270B2

公开(公告)日：2011-02-01

申请号：US11792015

申请日：2005-12-12

申请人： Bernd Heinemann ,  Holger Rücker ,  Jürgen Drews ,  Steffen Marschmeyer

发明人： Bernd Heinemann ,  Holger Rücker ,  Jürgen Drews ,  Steffen Marschmeyer

IPC分类号： H01L29/732

CPC分类号： H01L29/66287 ,  H01L29/1004 ,  H01L29/66242 ,  H01L29/732 ,  H01L29/7378

摘要： A vertical heterobipolar transistor comprising a substrate of semiconductor material of a first conductivity type and an insulation region provided therein, a first semiconductor electrode arranged in an opening of the insulation region and comprising monocrystalline semiconductor material of a second conductivity type, which is either in the form of a collector or an emitter, and which has a first heightwise portion and an adjoining second heightwise portion which is further away from the substrate interior in a heightwise direction, wherein only the first heightwise portion is enclosed by the insulation region in lateral directions perpendicular to the heightwise direction, a second semiconductor electrode of semiconductor material of the second conductivity type, which is in the form of the other type of semiconductor electrode, a base of monocrystalline semiconductor material of the first conductivity type, and a base connection region having a monocrystalline portion which in a lateral direction laterally surrounds the second heightwise portion, which is further towards the substrate interior as viewed from the base, of the first semiconductor electrode, and which rests with its underside directly on the insulation region.

摘要翻译： 一种垂直异双极晶体管，包括第一导电类型的半导体材料的衬底和设置在其中的绝缘区域，布置在绝缘区域的开口中的第一半导体电极，并且包括第二导电类型的单晶半导体材料， 收集器或发射器的形式，并且具有第一高度部分和相邻的第二高度部分，其在高度方向上远离基板内部，其中只有第一高度方向部分被垂直的横向方向上的绝缘区域包围 第二导电类型的半导体材料的第二半导体电极是另一种类型的半导体电极的形式的第二半导体电极，第一导电类型的单晶半导体材料的基底和具有第一导电类型的基底连接区域 单晶部分 横向方向横向地围绕第二高度方向部分，第二高度方向部分从第一半导体电极的基部朝向基板内部，并且其下侧直接位于绝缘区域上。

公开(公告)号：US07323390B2

公开(公告)日：2008-01-29

申请号：US10496531

申请日：2002-12-02

申请人： Bernd Heinemann ,  Dieter Knoll ,  Karl-Ernst Ehwald ,  Holger Rücker

发明人： Bernd Heinemann ,  Dieter Knoll ,  Karl-Ernst Ehwald ,  Holger Rücker

IPC分类号： H01L21/31

CPC分类号： H01L29/66287 ,  H01L29/0821 ,  H01L29/1004 ,  H01L29/7325

摘要： The semiconductor device according to the invention includes a substrate, a field insulating region which delimits an active region of the semiconductor substrate, a collector, at least one collector contact region associated with the collector, and a base with an associated base connection region. The collector and the collector contact region are formed in the same active region. In addition the base connection region extends partially over the active region and is separated from the surface of the active region by an insulator layer.

摘要翻译： 根据本发明的半导体器件包括衬底，限定半导体衬底的有源区域的场绝缘区域，集电极，与集电极相关联的至少一个集电极接触区域以及具有相关联的基极连接区域的基极。 集电极和集电极接触区形成在相同的有源区中。 此外，基极连接区部分地延伸到有源区上方并且通过绝缘体层与有源区的表面分离。

公开(公告)号：US07307336B2

公开(公告)日：2007-12-11

申请号：US10497827

申请日：2002-12-06

申请人： Karl-Ernst Ehwald ,  Alexander Fox ,  Dieter Knoll ,  Bernd Heinemann ,  Steffen Marschmayer ,  Katrin Blum

发明人： Karl-Ernst Ehwald ,  Alexander Fox ,  Dieter Knoll ,  Bernd Heinemann ,  Steffen Marschmayer ,  Katrin Blum

IPC分类号： H01L27/102

CPC分类号： H01L29/66242 ,  H01L21/8249 ,  H01L27/0623 ,  H01L29/7378

摘要： The invention concerns a bipolar transistor with an epitaxially grown base and a self-positioned emitter, whereby the base is formed from a first substantially monocrystalline epitaxial region (1) which is arranged in parallel relationship to the surface of the semiconductor substrate (2) and a second substantially polycrystalline and highly doped region (3) of the same conductivity type which is arranged in perpendicular relationship to the substrate surface and encloses the first region at all sides and that said second region, at least at one side but preferably at all four sides, is conductingly connected to a third, preferably highly doped or metallically conducting, high temperature-resistant polycrystalline layer (4) which is arranged in parallel relationship to the surface of the semiconductor substrate and forms or includes the outer base contact to a metallic conductor track system.

摘要翻译： 本发明涉及一种具有外延生长的基极和自定位发射极的双极晶体管，由此该基极由与半导体衬底（2）的表面平行关系设置的第一基本单晶外延区（1）形成，以及 相同导电类型的第二基本上多晶和高度掺杂的区域（3），其被布置成与衬底表面成垂直的关系，并且在所有侧面包围第一区域，并且所述第二区域至少在一侧，但优选地全部为四个 侧面与第三，优选高度掺杂或金属导电的耐高温多晶层（4）导电连接，该多晶层与半导体衬底的表面平行地布置，并形成或包括与金属导体 轨道系统