Copper metallization for through-glass vias on thin glass

    公开(公告)号:US12200875B2

    公开(公告)日:2025-01-14

    申请号:US17277748

    申请日:2019-09-20

    Abstract: A method for metallizing through-glass vias in a glass substrate includes functionalizing a surface of the glass substrate with a silane. The glass substrate has an average thickness t and comprises a plurality of vias extending through the thickness t. The method further includes applying an electroless plating solution comprising a copper ion to deposit a copper seed layer on the functionalized surface, disposing an electrolyte within the plurality of vias, wherein the electrolyte comprises copper ions to be deposited on the copper seed layer within the plurality of vias; positioning an electrode within the electrolyte; and applying a current between the electrode and the glass substrate, thereby reducing the copper ions into copper within the plurality of vias such that each of the plurality of vias is filled with copper and the copper has a void volume fraction of less than 5%.

    Communication system and communication method using reconfigurable intelligent surface and reconfigurable intelligent surface device

    公开(公告)号:US12199714B2

    公开(公告)日:2025-01-14

    申请号:US18085527

    申请日:2022-12-20

    Abstract: An aspect of the disclosure includes a communication system and a communication method using reconfigurable intelligent surface and a reconfigurable intelligent surface device. The communication system includes at least one base station, a reconfigurable intelligent surface device, and a control at one least device. The at least one base station respectively transmits at least one beam. The reconfigurable intelligent surface device is coupled to the at least one base station, and measures the at least one beam of the at least one base station to obtain signal measurement results associated with each of the at least one base station. The control device is coupled to the at least one base station. The control device groups the at least one base station and the reconfigurable intelligent surface device into at least one group according to the signal measurement results associated with each of the at least one base station.

    Phase shift-based three-dimensional measurement system with multiple calibration surfaces and calibration method thereof

    公开(公告)号:US12196542B2

    公开(公告)日:2025-01-14

    申请号:US17744451

    申请日:2022-05-13

    Abstract: A calibration method of three-dimensional measurement system includes a projection device, a camera and a processor. The projection device projects structural light to a reference object including a first calibration surface and a second calibration surface. The camera photographs the reference object to obtain at least one reference object image. The processor performs decoding according to the at least one reference object image to obtain a plurality of pieces of phase data of the at least one reference object image. The processor computes a first phase corresponding to the first calibration surface and a second phase corresponding to the second calibration surface according to the phase data, calculates a surface phase difference between the first phase and the second phase, and computes according to the surface phase difference and a height of the second calibration surface relative to the first calibration surface to obtain a phase-height conversion parameter.

    SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREFOR

    公开(公告)号:US20240422990A1

    公开(公告)日:2024-12-19

    申请号:US18687308

    申请日:2022-08-29

    Abstract: A semiconductor device and a manufacturing method therefor are provided. The method includes: depositing a first dielectric layer material on a semiconductor substrate, and etching the first dielectric layer material to form a trench corresponding to each via in the semiconductor substrate in a first dielectric layer; the via being filled with a metal material; depositing a bottom electrode material in the trench, and etching the bottom electrode material to form a bottom electrode covering a bottom of the trench; depositing a resistive layer material to form a resistive layer covering an upper surface of the bottom electrode and a sidewall of the trench; and depositing a top electrode material in a groove of the resistive layer, such that the groove is filled with the top electrode material to form a top electrode which is arranged in the groove and fills the groove.

    MATERIAL CUTTING AND GRINDING DEVICE

    公开(公告)号:US20240416478A1

    公开(公告)日:2024-12-19

    申请号:US18531759

    申请日:2023-12-07

    Abstract: A material cutting and grinding device is provided. The material cutting and grinding device includes a shaft, a rotor assembly, a cutting grinding sheet, a fixture and a channel set. The rotor assembly includes a housing, a rotor, an air intake opening, blades and accommodating grooves. The rotor is accommodated in a holding groove of the housing. The rotor is sleeved on the shaft. The accommodating grooves are passed through the rotor. The blades are passed through the accommodating grooves. The cutting grinding sheet is connected to the other end of the shaft. The fixture clamps the cutting grinding sheet. The channel set includes a shaft channel and a gas channel. The shaft channel is passing through the shaft. The gas channel is disposed on the fixture. The gas channel is connected to the shaft channel.

    High-frequency component test device and method thereof

    公开(公告)号:US12163989B2

    公开(公告)日:2024-12-10

    申请号:US17559371

    申请日:2021-12-22

    Abstract: A high-frequency component test device including a test key and a test module is provided. The test key includes a front-level key and a back-level key which are arranged symmetrically and have the same electrical length and characteristic impedance. The test module is used to measure an S parameter of the front-level key and the back-level key connected directly and an S parameter of a structure where a device under test (DUT) is added between the front-level key and the back-level key. The test module performs S parameter calculation in the frequency domain and converts the S parameter into an ABCD parameter matrix, and then obtains an ABCD parameter of a de-embedded DUT using a matrix root-opening operation and an inverse matrix operation.

    Arrayed switch circuit, switching element and system chip package structure

    公开(公告)号:US12154905B2

    公开(公告)日:2024-11-26

    申请号:US17372132

    申请日:2021-07-09

    Abstract: An arrayed switch circuit includes a substrate, signal conductive pads and signal expansion pins. The signal conductive pads are disposed on the substrate at intervals, and the signal conductive pads are arranged to form a signal conductive pad array. Each of the signal conductive pads has a row position and a column position in the signal conductive pad array. A row signal switch is provided between any two adjacent signal conductive pads corresponding to the same row position, and a column signal switch is provided between any two adjacent signal conductive pads corresponding to the same column position. The signal expansion pins are connected to the signal conductive pads located on at least one side of the signal conductive pad array through signal expansion switches respectively.

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