Abstract:
Disclosed herein are methods of searching for a host in a network using IPv4 and of blocking and searching a host in an IPv6 network which blocking access to an unauthorized network. The present invention provides a method of searching for a host in an IPv6 network, including the steps of requesting host information, including link-layer address information and IP address information about an IP to be searched for, by sending a Neighbor Solicitation (NS) packet in which the IP to be searched for is set in an ICMPv6 target address to the network, after sending the NS packet, waiting for a predetermined time by taking a processing speed of a host and a transfer rate according to a network environment and state into consideration, after the predetermined time of waiting, determining whether a Neighbor Advertisement (NA) packet of the IP to be searched for has been received, and if, as a result of the determination, the NA packet of the IP to be searched for is determined to have been received, acquiring the host information from the NA packet.
Abstract:
An integrated power amplifier can include a carrier amplifier, where the carrier amplifier is connected to a first quarter wave transformer at the input of the carrier amplifier. In addition, the power amplifier can further include at least one peaking amplifier connected in parallel with the carrier amplifier; a first differential combining structure, where the first combining structure includes a first plurality of quarter wave transformers that are configured to combine respective first differential outputs of the carrier amplifier in phase to generate a first single-ended output signal, and a second differential combining structure, where the second combining structures includes a second plurality of quarter wave transformers that are configured to combine respective second differential outputs of the at least one peaking amplifier in phase to generate a second single-ended output signal, where the first single-ended output signal and the second single-ended output signal are combinable in-phase to provide an overall output.
Abstract:
A driving device including a board on which a timing controller for signal processing and a memory are mounted, the board having a conductive field, in which the conductive field has a non-contact region which is coated with an insulating material, and an exposed contact region which is not covered with the insulating material, the exposed contact region formed adjacent to the timing controller or the memory, a conductive member disposed in the exposed contact region, and a shield covering the board and electrically connected to the conductive field via the conductive member
Abstract:
A voltage regulator includes an active control switch, an active sync switch, a driver circuit, and a gate resistor. The active control switch is coupled between an input voltage line and an input of an energy storage device. The active sync switch is coupled to the input of the energy storage device. The driver circuit is coupled to the control and sync switches to alternately drive each of the control and sync switches into a conducting state to produce a regulated voltage at an output of the energy storage device. The gate resistor is coupled in series within a control path of the sync switch. The gate resistor has a resistance value that is tuned to reduce an anticipated dead time between a turn-off time of the sync switch and a turn-on time of the control switch.
Abstract:
Embodiments of the invention may provide for power amplifier systems and methods. The systems and methods may include a power amplifier that generates a first differential output signal and a second differential output signal, a primary winding comprised of a plurality of primary segments, where a first end of each primary segment is connected to a first common input port and a second end of each primary segment is connected to a second common input port, where the first common input port is operative to receive the first differential output signal, and where the second common input port is operative to receive the second differential output signal, and a single secondary winding inductively coupled to the plurality of primary segments.
Abstract:
A color filtering member for improving the brightness of a display device is presented. The color filtering member includes colored regions (e.g., regions with RBG color filters) and black-and-white regions for transmitting white light. The black-and-white regions may be colorless gaps between adjacent colored regions. Multiple planarizing layers may be deposited on the colored regions and the black-and-white regions to form a surface that is sufficiently even. The color filtering member may include an intercepting region that extends between neighboring colored regions. The position of the intercepting region is not centered between the two colored regions that it separates. Rather, the intercepting region is shifted in the direction of rubbing (in the direction of liquid crystal alignment) to more effectively cover the regions where light leakage occurs. This color filtering member may be combined with an array member and a liquid crystal layer to form a display device.
Abstract:
An LCD device provides enhanced display quality. An insulating layer is formed on a first substrate. The insulating layer covers the contact portion of a switching device in which the switching device is electrically connected to a transparent electrode and has an opening for exposing a portion of the transparent electrode. A reflection electrode is electrically connected to the transparent electrode through the opening. The insulation layer covers a first portion of a driving circuit formed on the first substrate. A sealant is interposed between the first and second substrate to engage the first and second substrate and to cover a second portion of the driving circuit. Therefore, the driver circuit may operate normally, and the distortion of the signal outputted from the driver circuit may be prevented.
Abstract:
Multi-chip package includes first through Nth semiconductor chips, each of which includes an input/output pad, an input/output driver coupled to the input/output pad, and an internal circuit. Each of the first through Nth semiconductor chips includes an internal pad for coupling the internal input/output driver and the internal circuit. The internal pads of the first through Nth semiconductor chips are coupled to each other such as via a common pad installed at a substrate. The input/output pad of the first semiconductor chip directly receives an input/output signal transmitted via a corresponding pin of the multi-chip package. The second through Nth semiconductor chips indirectly receive the input/output signal via the internal pads coupled to each other. The multi-chip package can improve signal compatibility by maintaining a parasitic load of a pin to at least the level of a single chip, when a signal is transmitted to the pin at high speed. Also, when a signal that is not necessarily transmitted at high speed is applied to a pin, semiconductor chips can be packaged according to the preexisting methods.
Abstract:
Example embodiments of the invention may provide systems and methods for multiple transformers. The systems and methods may include a first transformer that may include a first primary winding and a first secondary winding, where the first primary winding may be inductively coupled to the first secondary winding, where the first transformer may be associated with a first rotational current flow direction in the first primary winding. The systems and methods may further include a second transformer that may include a second primary winding and a second secondary winding, where the second primary winding may be inductively coupled to the second secondary winding, where the second transformer may be associated with a second rotational current flow direction opposite the first rotational current flow direction in the second primary winding, where a first section of the first primary winding may be positioned adjacent to a second section of the second primary winding, and where the adjacent first and second sections may include a substantially same first linear current flow direction.
Abstract:
A light guide member capable of guiding light received from at least a first light source and second light source, wherein the first light source is spaced a distance D3 from the second light source. The light guide member may include a first side including a plurality of first grooves extending along a first direction and a plurality of second grooves extending along the first direction, wherein the first grooves may have a first pitch and the second grooves have a second pitch, the first pitch being different from the second pitch.