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    METHODS FOR FORMING FIN STRUCTURES WITH DESIRED DIMENSIONS FOR 3D STRUCTURE SEMICONDUCTOR APPLICATIONS
    132.
    发明申请
    METHODS FOR FORMING FIN STRUCTURES WITH DESIRED DIMENSIONS FOR 3D STRUCTURE SEMICONDUCTOR APPLICATIONS 审中-公开
    形成三维结构半导体应用所需尺寸的精细结构的方法

    公开(公告)号：US20150380526A1

    公开(公告)日：2015-12-31

    申请号：US14469241

    申请日：2014-08-26

    Applicant: Applied Materials, Inc.

    Inventor： Ludovic GODET ,  Srinivas D. NEMANI ,  Jun XUE ,  Ellie Y. YIEH

    IPC: H01L29/66 ,  H01L21/265 ,  H01L21/3205

    CPC classification number: H01L29/66795 ,  H01J37/32357 ,  H01J2237/334 ,  H01L21/2236 ,  H01L21/26506 ,  H01L21/3065 ,  H01L29/66803 ,  H01L29/785

    Abstract: Methods for forming fin structure with desired materials formed on different locations of the fin structure using an ion implantation process to define an etching stop layer followed by an etching process for manufacturing three dimensional (3D) stacking of fin field effect transistor (FinFET) for semiconductor chips are provided. In one embodiment, a method for forming a structure on a substrate includes performing an ion implantation process on a substrate having a plurality of structures formed thereon, forming an ion treated region in the structure at an interface between the ion treated region and an untreated region in the structure defining an etch stop layer, and performing a remote plasma etching process to etch the treated region from the substrate to exposed the untreated region.

    Abstract translation: 使用离子注入工艺在翅片结构的不同位置形成所需材料的翅片结构的方法，以限定蚀刻停止层，随后进行用于制造用于半导体的鳍状场效应晶体管（FinFET）的三维（3D）堆叠的蚀刻工艺 提供芯片。 在一个实施例中，用于在衬底上形成结构的方法包括在其上形成有多个结构的衬底上执行离子注入工艺，在离子处理区域和未处理区域之间的界面处在该结构中形成离子处理区域 在限定蚀刻停止层的结构中，以及执行远程等离子体蚀刻工艺，以从基板蚀刻经处理的区域以暴露未处理区域。

    DIRECTIONAL TREATMENT FOR MULTI-DIMENSIONAL DEVICE PROCESSING
    133.
    发明申请
    DIRECTIONAL TREATMENT FOR MULTI-DIMENSIONAL DEVICE PROCESSING 审中-公开
    多维设备处理的方向处理

    公开(公告)号：US20150325411A1

    公开(公告)日：2015-11-12

    申请号：US14703922

    申请日：2015-05-05

    Applicant: Applied Materials, Inc.

    Inventor： Ludovic GODET ,  Huixiong DAI ,  Srinivas D. NEMANI ,  Ellie Y. YIEH ,  Nitin Krishnarao INGLE

    IPC: H01J37/32

    Abstract: Embodiments of the disclosure include apparatus and methods for modifying a surface of a substrate using a surface modification process. The process of modifying a surface of a substrate generally includes the alteration of a physical or chemical property and/or redistribution of a portion of an exposed material on the surface of the substrate by use of one or more energetic particle beams while the substrate is disposed within a particle beam modification apparatus. Embodiments of the disclosure also provide a surface modification process that includes one or more pre-modification processing steps and/or one or more post-modification processing steps that are all performed within one processing system.

    Abstract translation: 本公开的实施方案包括使用表面改性方法修饰基材的表面的装置和方法。 修饰基材的表面的方法通常包括通过使用一种或多种能量粒子束来改变基材表面上暴露的材料的一部分的物理或化学性质和/或再分布，同时衬底被布置 在粒子束修改装置内。 本公开的实施例还提供了表面修改过程，其包括一个或多个预修改处理步骤和/或一个或多个修改后处理步骤，其全部在一个处理系统内执行。

    ASYMMETRIC METROLOGY TOOL FOR REFLECTIVE WAVEGUIDE
    134.
    发明申请
    ASYMMETRIC METROLOGY TOOL FOR REFLECTIVE WAVEGUIDE 有权

    公开(公告)号：US20250053099A1

    公开(公告)日：2025-02-13

    申请号：US18797716

    申请日：2024-08-08

    Applicant: Applied Materials, Inc.

    Inventor： Yangyang SUN ,  Jinxin FU ,  Sihui HE ,  Ludovic GODET

    IPC: G03F7/00

    Abstract: Embodiments described herein provide an asymmetric optical metrology system for evaluating and inspecting the performance of optical devices, such as augmented reality (AR) waveguide combiners. The system utilizes an asymmetric optical configuration and fly-eye illumination to enhance the detection limit of image sharpness and the accuracy of luminance uniformity. By employing different lenses with various focal lengths, the system increases the sampling rate in the angular space, addressing the challenges of form factor limitations and pixel density inherent in conventional metrology tools. Embodiments described herein offer improved contrast and sharp image details, as well as a compact design, making it suitable for the development, optimization, and quality control of optical devices, such as AR waveguide combiners.

    LITHOGRAPHY METHOD TO FORM STRUCTURES WITH SLANTED ANGLE
    135.
    发明申请
    LITHOGRAPHY METHOD TO FORM STRUCTURES WITH SLANTED ANGLE 有权

    公开(公告)号：US20250053082A1

    公开(公告)日：2025-02-13

    申请号：US18933099

    申请日：2024-10-31

    Applicant: Applied Materials, Inc.

    Inventor： Yongan XU ,  Jinxin FU ,  Jhenghan YANG ,  Ludovic GODET

    IPC: G03F7/00 ,  G02B6/122 ,  G02B6/136

    Abstract: The present disclosure generally relates to methods of forming optical devices comprising nanostructures disposed on transparent substrates. A first process of forming the nanostructures comprises depositing a first layer of a first material on a glass substrate, forming one or more trenches in the first layer, and depositing a second layer of a second material in the one or more holes to trenches a first alternating layer of alternating first portions of the first material and second portions of the second material. The first process is repeated one or more times to form additional alternating layers over the first alternating layer. Each first portion of each alternating layer is disposed in contact with and offset a distance from an adjacent first portion in adjacent alternating layers. A second process comprises removing either the first or the second portions from each alternating layer to form the plurality of nanostructures.

    METHOD FOR ROUGHNESS REDUCTION IN MANUFACTURING OPTICAL DEVICE STRUCTURES
    138.
    发明公开
    METHOD FOR ROUGHNESS REDUCTION IN MANUFACTURING OPTICAL DEVICE STRUCTURES 审中-公开

    公开(公告)号：US20230375774A1

    公开(公告)日：2023-11-23

    申请号：US18303804

    申请日：2023-04-20

    Applicant: Applied Materials, Inc.

    Inventor： Thomas James SOLDI ,  Joseph OLSON ,  Morgan EVANS ,  Ludovic GODET

    IPC: F21V8/00 ,  G02B5/18

    CPC classification number: G02B6/0065 ,  G02B5/1857 ,  G02B6/0016 ,  G02B6/0036

    Abstract: Embodiments described herein relate to a method of using an apparatus for forming waveguides. The method includes positioning a substrate at a first rotation angle, exposing the substrate to an ion beam, forming first partial trenches defined by adjacent angled device structures with the first device angle, rotating the substrate to a second rotation angle, exposing the substrate to the ion beam, etching the first partial trenches, and repeating the method from about 1 cycle to about 100 cycles to form a plurality of trenches defined by adjacent angled device structures. The first rotation angle is selected to form one or more angled device structures with a first device angle relative to a vector parallel to the substrate. The ion beam is configured to contact the substrate at a beam angle ϑ relative to a surface normal of the substrate.

    RESIST MODELING METHOD FOR ANGLED GRATINGS
    140.
    发明公开
    RESIST MODELING METHOD FOR ANGLED GRATINGS 审中-公开

    公开(公告)号：US20230296880A1

    公开(公告)日：2023-09-21

    申请号：US18123085

    申请日：2023-03-17

    Applicant: Applied Materials, Inc.

    Inventor： Yongan XU ,  Jin XU ,  William WILKINSON ,  Ludovic GODET

    IPC: G02B27/00

    CPC classification number: G02B27/0012

    Abstract: Methods of forming a resist model for angled gratings on optical devices. In one example, a method includes designing a model with a model area and a verification area with initial mask patterns having a first grating pattern with a first angle and a first critical dimension and fabricating test masks with the model area having a first model angle and a first model critical dimension and the verification area having a first verification angle and a first verification critical dimension. The method also includes patterning a substrate with the test masks, measuring the first model angle, the first model critical dimension, the first verification angle and the first verification critical dimension, and fabricating a new device mask if the first verification angle is within the threshold range of the first desired angle and the first verification critical dimension is within the threshold range of the first desired critical dimension.

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