公开(公告)号：US20160254298A1

公开(公告)日：2016-09-01

申请号：US14646925

申请日：2014-10-01

Applicant: BOE TECHNOLOGY GROUP CO., LTD.

Inventor： Chunping Long ,  Yinan Liang ,  Lujiang Huangfu

IPC: H01L27/12 ,  H01L21/28 ,  H01L29/66 ,  H01L29/786

CPC classification number: H01L27/1288 ,  H01L21/28008 ,  H01L21/28158 ,  H01L21/28506 ,  H01L27/12 ,  H01L27/1262 ,  H01L27/127 ,  H01L27/1274 ,  H01L27/3244 ,  H01L29/66765 ,  H01L29/78678 ,  H01L29/78696 ,  H01L2251/5315

Abstract: An array substrate, a manufacturing method thereof and a display device are disclosed. Patterns comprising a gate, a gate insulating layer and a polysilicon active layer are formed on a base substrate by single patterning process. A passivation layer is formed on the substrate surface formed with the patterns, and patterns of a first via and a second via are formed on a surface of the passivation layer by single patterning process. Patterns of a source, a drain and a pixel electrode are formed on the substrate surface formed with the patterns by single patterning process. The source is electrically connected with the polysilicon active layer through the first via, and the drain is electrically connected with the polysilicon active layer through the second via. A pattern of pixel defining layer is formed on the substrate surface formed with the patterns by single patterning process.

Abstract translation: 公开了阵列基板，其制造方法和显示装置。 通过单一图案化工艺在基底基板上形成包括栅极，栅极绝缘层和多晶硅有源层的图案。 在形成有图案的基板表面上形成钝化层，并且通过单一图案化工艺在钝化层的表面上形成第一通孔和第二通孔的图案。 通过单一图案化工艺，在形成有图案的衬底表面上形成源极，漏极和像素电极的图案。 源极通过第一通孔与多晶硅有源层电连接，漏极通过第二通孔与多晶硅有源层电连接。 通过单一图案化工艺在形成有图案的衬底表面上形成像素限定层的图案。

公开(公告)号：US09251737B2

公开(公告)日：2016-02-02

申请号：US14382506

申请日：2013-12-05

Applicant: BOE TECHNOLOGY GROUP CO., LTD.

Inventor： Liang Sun ,  Jang Soon Im ,  Lujiang Huangfu

IPC: G09G3/32 ,  G09G5/10

CPC classification number: G09G3/3291 ,  G09G3/3208 ,  G09G3/3233 ,  G09G3/3258 ,  G09G5/10 ,  G09G2300/0426 ,  G09G2300/0819 ,  G09G2300/0842 ,  G09G2320/0223 ,  G09G2320/0233 ,  G09G2330/028

Abstract: A pixel circuit, display panel and display apparatus are provided. The pixel circuit comprises a driving sub-circuit, whose first terminal is connected with first reference voltage source via power supply lead, and second terminal is connected with first terminal of a light emitting device; a charging sub-circuit, whose output terminal is connected with third terminal of the driving sub-circuit, which is configured to charge the driving sub-circuit before the driving sub-circuit drives the light emitting device to emit light; and a compensation sub-circuit, whose first terminal is connected with second terminal of the light emitting device, second terminal is connected with second reference voltage source, which is configured to compensate for voltage drop on the power supply lead of voltage which is provided to the driving sub-circuit from the first reference voltage source, so as to raise the uniformity of display brightness within display area of the panel.

Abstract translation: 提供像素电路，显示面板和显示装置。 像素电路包括驱动子电路，其第一端子经由电源引线与第一参考电压源连接，第二端子与发光器件的第一端子连接; 充电子电路，其输出端子与驱动子电路的第三端子连接，其被配置为在驱动子电路驱动发光器件发光之前对驱动子电路充电; 以及补偿子电路，其第一端子与发光器件的第二端子连接，第二端子与第二参考电压源连接，第二参考电压源被配置为补偿电源引线上的电压降，其被提供给 来自第一参考电压源的驱动子电路，以便提高面板显示区域内的显示亮度的均匀性。

公开(公告)号：US12295226B2

公开(公告)日：2025-05-06

申请号：US17762692

申请日：2021-04-15

Applicant: BOE Technology Group Co., Ltd.

Inventor： Yipeng Chen ,  Lujiang Huangfu ,  Libin Liu

IPC: H01L27/32 ,  H10K59/121 ,  H10K59/126 ,  H10K59/131 ,  H10K59/12

Abstract: The present disclosure provides a display panel and a method of manufacturing the same and a display device. In a sub-pixel driving circuit of the display panel, a gate electrode of a driving transistor is coupled to a second electrode of a second transistor through a fourth conductive connection portion, and a second electrode plate of a storage capacitor is coupled to a second electrode of a first transistor through a third conductive connection portion, a gate electrode of the first transistor and a gate electrode of the second transistor are respectively coupled to a gate line pattern in the corresponding sub-pixel area; orthographic projection of the gate line pattern on the substrate does not overlap orthographic projection of the third conductive connecting portion on the substrate, and/or does not overlap orthographic projection of the fourth conductive connection portion on the substrate.

公开(公告)号：US20250095535A1

公开(公告)日：2025-03-20

申请号：US18962357

申请日：2024-11-27

Applicant: BOE TECHNOLOGY GROUP CO., LTD.

Inventor： Long HAN ,  Libin Liu ,  Lujiang Huangfu

IPC: G09G3/20 ,  G09G3/3233

Abstract: The present disclosure relates to an array substrate and a display device. The array substrate includes a plurality of pixel units arranged in an array, each of the pixel units including a plurality of sub-pixels. The array substrate includes: a plurality of power lines which are arranged in a conductive layer on a base substrate, are arranged at intervals along a first direction and extend along a second direction, and are used for providing power signals to the sub-pixels; and a plurality of power leads which are arranged in another conductive layer, are arranged at intervals along the second direction and extend along the first direction. Projections of at least one of the power lines and at least one of the power leads on the base substrate intersect, and the projections of the power lines and the power leads on the base substrate form a grid-like structure.

公开(公告)号：US12232349B2

公开(公告)日：2025-02-18

申请号：US17229213

申请日：2021-04-13

Applicant: BOE TECHNOLOGY GROUP CO., LTD.

Inventor： Pinfan Wang ,  Chenyu Chen ,  Lujiang Huangfu ,  Fangxu Cao ,  Yucheng Chan

IPC: H01L51/52 ,  G02F1/1333 ,  H10K50/84 ,  B32B7/12

Abstract: The present disclosure relates to a display device, which includes a curved cover plate, an optical adhesive layer, and a display module that are sequentially disposed in a thickness direction thereof. The display module includes a curved surface region, the curved surface region being curved in at least two intersecting directions to form a spherical surface; the curved surface region comprises a first sub-area and a second sub-area, the second sub-area is located on a side of the first sub-area away from a center of curvature of the spherical surface; the second sub-area is wavy in the thickness direction, the wavy second sub-area is composed of a plurality of arc-shaped structures, and protruding directions of adjacent arc-shaped structures are opposite to each other; and the optical adhesive layer is completely attached to each of the arc-shaped structures.

公开(公告)号：US12198599B2

公开(公告)日：2025-01-14

申请号：US18494796

申请日：2023-10-26

Applicant: BOE TECHNOLOGY GROUP CO., LTD.

Inventor： Long Han ,  Libin Liu ,  Lujiang Huangfu

IPC: G09G3/20 ,  G09G3/3233

Abstract: The present disclosure relates to an array substrate and a display device. The array substrate includes a plurality of pixel units arranged in an array, each of the pixel units including a plurality of sub-pixels. The array substrate includes: a plurality of power lines which are arranged in a conductive layer on a base substrate, are arranged at intervals along a first direction and extend along a second direction, and are used for providing power signals to the sub-pixels; and a plurality of power leads which are arranged in another conductive layer, are arranged at intervals along the second direction and extend along the first direction. Projections of at least one of the power lines and at least one of the power leads on the base substrate intersect, and the projections of the power lines and the power leads on the base substrate form a grid-like structure.

公开(公告)号：US12058910B2

公开(公告)日：2024-08-06

申请号：US17551341

申请日：2021-12-15

Applicant: BOE TECHNOLOGY GROUP CO., LTD.

Inventor： Lujiang Huangfu ,  Xiaodan Jin ,  Yinan Liang ,  Zhenzhen Li ,  Wenjing Tan ,  Libin Liu ,  Qian Yang ,  Hongli Wang

IPC: H10K59/35 ,  G02F1/1343 ,  G09G3/20 ,  H10K59/122

CPC classification number: H10K59/353 ,  G02F1/134345 ,  G09G3/2003 ,  G02F2201/52 ,  G09G2300/0452 ,  H10K59/122

Abstract: A display substrate including a first display area including a plurality of first sub-pixels, a plurality of second sub-pixels and a plurality of third sub-pixels, wherein the display substrate includes a plurality of first pixel groups each of which includes two third sub-pixels, one first sub-pixel and one second sub-pixel, the two third sub-pixels are arranged adjacent to each other along a first direction, the one first sub-pixel and the one second sub-pixel are adjacent to at least one of the two third sub-pixels, located on both sides of a straight line passing centers of the two third sub-pixels, and arranged along a second direction different from the first direction; a size of the first sub-pixel and the second sub-pixel in the second direction is smaller than a size of the first sub-pixel and the second sub-pixel in the first direction, respectively.

公开(公告)号：US11997899B2

公开(公告)日：2024-05-28

申请号：US17785662

申请日：2021-08-11

Applicant: BOE Technology Group Co., Ltd.

Inventor： Can Zheng ,  Lujiang Huangfu ,  Libin Liu ,  Shiming Shi

IPC: G09G3/3233 ,  G09G3/3266 ,  G09G3/3291 ,  H10K59/121 ,  H10K59/131 ,  H10K59/12

CPC classification number: H10K59/131 ,  G09G3/3233 ,  G09G3/3266 ,  G09G3/3291 ,  H10K59/1213 ,  H10K59/1216 ,  G09G2300/0852 ,  G09G2310/0278 ,  G09G2310/061 ,  G09G2320/0233 ,  H10K59/1201

Abstract: The present disclosure provides a pixel circuit, a pixel driving method, a display panel and a display device. The pixel circuit includes a light-emitting element, a driving circuitry, a first energy storage circuitry, a second energy storage circuitry, a data writing circuitry and a compensation circuitry. The data writing circuitry is configured to write a data voltage into a first end of the first energy storage circuitry under the control of a gate driving signal provided by a gate line. The compensation circuitry is configured to control a control end of the driving circuitry to be electrically coupled to a second end of the driving circuitry under the control of a compensation control signal. The driving circuitry is configured to generate a driving current for driving the light-emitting element under the control of a potential at its control end.

公开(公告)号：US11950468B2

公开(公告)日：2024-04-02

申请号：US17762975

申请日：2021-04-15

Applicant: BOE Technology Group Co., Ltd.

Inventor： Yipeng Chen ,  Lujiang Huangfu ,  Libin Liu

IPC: H10K59/131 ,  G09G3/3225 ,  H10K59/121 ,  H10K71/00 ,  H10K59/12 ,  H10K59/35

CPC classification number: H10K59/131 ,  G09G3/3225 ,  H10K59/1213 ,  H10K59/1216 ,  H10K71/00 ,  G09G2300/0426 ,  G09G2300/0465 ,  G09G2300/0842 ,  H10K59/1201 ,  H10K59/351

Abstract: The present disclosure provides a display panel, a method of manufacturing the same, and a display device. The initialization signal line layer in the display panel includes an initialization signal line pattern arranged in each of the plurality of sub-pixel areas; the first auxiliary signal line layer includes a plurality of first auxiliary signal line patterns corresponding to the plurality of sub-pixel areas in a one-to-one manner, and the first auxiliary signal line pattern is coupled to an initialization signal line pattern in a corresponding sub-pixel area, at least part of the first auxiliary signal line pattern extends along the first direction, and first auxiliary signal line patterns corresponding to sub-pixel areas in a same row of sub-pixel areas are sequentially coupled.

公开(公告)号：US11908404B2

公开(公告)日：2024-02-20

申请号：US17599387

申请日：2021-01-14

Applicant: BOE TECHNOLOGY GROUP CO., LTD.

Inventor： Lujiang Huangfu ,  Libin Liu ,  Can Zheng

IPC: G09G3/3233

CPC classification number: G09G3/3233 ,  G09G2300/0842 ,  G09G2310/061 ,  G09G2310/08 ,  G09G2330/02

Abstract: The present disclosure provides a display panel, a pixel circuit and a method for driving the pixel circuit, the pixel circuit includes: a storage capacitor circuit; a light-emitting element; a driving transistor; a reset circuit, the reset circuit is configured to receive a reset control signal and reset a first node and a second node according to the reset control signal, or receive a writing control signal and/or a timing sequence control signal of an adjacent pixel row and reset the first node and the second node according to the writing control signal and/or the timing sequence control signal of the adjacent pixel row; a threshold compensation circuit, configured to receive a compensation control signal and write a compensation voltage into the first node according to the compensation control signal; a writing circuit; and a light-emitting control circuit.