THIN FILM TRANSISTOR AND MANUFACTURING METHOD THEREOF, ARRAY SUBSTRATE AND DISPLAY DEVICE
    121.
    发明申请
    THIN FILM TRANSISTOR AND MANUFACTURING METHOD THEREOF, ARRAY SUBSTRATE AND DISPLAY DEVICE 审中-公开
    薄膜晶体管及其制造方法,阵列基板和显示器件

    公开(公告)号:US20150171224A1

    公开(公告)日:2015-06-18

    申请号:US14124104

    申请日:2012-12-06

    CPC classification number: H01L29/78606 H01L27/1248 H01L29/41733 H01L29/6675

    Abstract: Embodiments of the present invention relate to display technology field and provide a thin film transistor (1) and manufacturing method thereof, an array substrate, and a display device, and do not damage an active layer (12) of the thin film transistor while forming vias (16) over the source region (120) and the drain region (121) with via etching process. The thin film transistor (1) comprises a substrate (10), an active layer (12), a gate insulating layer (13), a gate (14) and an inter-layer insulating layer (17) disposed on the substrate (10), and further comprises: a conductive etching barrier layer (15) disposed on the active layer; the conductive etching barrier layer (15) being located to correspond to the source region (120) and the drain region (121) of the active layer (12) and vias (16) being formed over the source region (120) and the drain region (121) of the active layer (12) and not extending beyond edges of the conductive etching barrier layer (15).

    Abstract translation: 本发明的实施例涉及显示技术领域并提供薄膜晶体管(1)及其制造方法,阵列基板和显示装置,并且不会在形成时损坏薄膜晶体管的有源层(12) 通过蚀刻工艺在源区(120)和漏区(121)之间的通路(16)。 薄膜晶体管(1)包括基板(10),有源层(12),栅极绝缘层(13),栅极(14)和布置在基板(10)上的层间绝缘层 ),还包括:设置在所述有源层上的导电蚀刻阻挡层(15) 所述导电蚀刻阻挡层(15)被定位成对应于有源层(12)的源极区域(120)和漏极区域(121)以及形成在源极区域(120)和漏极 (12)的区域(121),并且不延伸超过导电蚀刻阻挡层(15)的边缘。

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