Abstract:
Systems and methods are provided for differential sensing (DS), difference-differential sensing (DDS), correlated double sampling (CDS), and/or programmable capacitor matching to reduce display panel sensing noise. An electronic device may include one or more processors and an electronic display. The one or more processors may generate image data and adjust the image data based at least in part on display sensing feedback. The electronic display may employ sensing circuitry that obtains the display sensing feedback at least in part by applying test data to a pixel of a column of an active area of the display and differentially senses an electrical value of the pixel in comparison to a reference signal from a different column. This reference signal may provide a common mode noise reference, which is removed by the differential sensing and thereby enhances a quality of the sensed electrical value of the pixel.
Abstract:
A display may have an array of pixels formed from organic light-emitting diodes and thin-film transistor circuitry. A planarization layer may be interposed between the thin-film transistor circuitry and the organic light-emitting diodes. To protect the organic light-emitting diodes from photoactive compounds that may be outgassed from the planarization layer, an inorganic barrier layer may be interposed between the planarization layer and the organic light-emitting diodes. The inorganic barrier layer may be formed on top of and/or below a pixel definition layer that defines light-emitting zones for the organic light-emitting diodes. In another suitable arrangement, the inorganic barrier layer may itself define light-emitting zones and may be used in place of a polymer-based pixel definition layer. The inorganic barrier layer may include trenches in which the emissive material of the light-emitting diodes is formed.
Abstract:
A display may have an array of organic light-emitting diode display pixels. Each display pixel may have a light-emitting diode that emits light under control of a drive transistor. Each display pixel may also have control transistors for compensating and programming operations. The array of display pixels may have rows and columns. Row lines may be used to apply row control signals to rows of the display pixels. Column lines (data lines) may be used to apply display data and other signals to respective columns of display pixels. A bottom conductive shielding structure may be formed below each drive transistor. The bottom conductive shielding structure may serve to shield the drive transistor from any electric field generated from the adjacent row and column lines. The bottom conductive shielding structure may be electrically floating or coupled to a power supply line.
Abstract:
A display may have an array of pixels formed from organic light-emitting diodes and thin-film transistor circuitry. A planarization layer may be interposed between the thin-film transistor circuitry and the organic light-emitting diodes. To protect the organic light-emitting diodes from photoactive compounds that may be outgassed from the planarization layer, an inorganic barrier layer may be interposed between the planarization layer and the organic light-emitting diodes. The inorganic barrier layer may be formed on top of and/or below a pixel definition layer that defines light-emitting zones for the organic light-emitting diodes. In another suitable arrangement, the inorganic barrier layer may itself define light-emitting zones and may be used in place of a polymer-based pixel definition layer. The inorganic barrier layer may include trenches in which the emissive material of the light-emitting diodes is formed.
Abstract:
A display may have an array of pixels arranged in rows and columns. Display driver circuitry may load data into the pixels via data lines that extend along the columns. The display driver circuitry may include gate driver circuitry that supplies horizontal control signals to rows of the pixels. The horizontal control signals may include emission enable signals for controlling emission enable transistors and scan signals for controlling switching transistors. During an emission phase of operation for the display, the emission enable signal may be pulse-width modulated by the emission control gate driver circuits in the gate driver circuitry to control the output of the light-emitting diodes. The emission control gate driver circuits may be controlled using an emission start signal and a pair of two-phase clocks.
Abstract:
A display may include an array of pixels. Each pixel in the array includes an organic light-emitting diode coupled to a drive transistor, a data loading transistor, a first capacitor for storing data charge, and a second capacitor. During a data programming phase, the data loading transistor may be activated to load in a data value onto the first capacitor. After the data programming phase, the second capacitor may be configured to receive a lower voltage, which extends a threshold voltage sampling time for the pixel. Configured and operated in this way, the temperature luminance sensitivity of the display can be reduced.
Abstract:
A display may have an array of pixels. Display driver circuitry may supply data and control signals to the pixels. Each pixel may have seven transistors, a capacitor, and a light-emitting diode such as an organic light-emitting diode. The seven transistors may receive control signals using horizontal control lines. Each pixel may have first and second emission enable transistors that are coupled in series with a drive transistor and the light-emitting diode of that pixel. The first and second emission enable transistors may be coupled to a common control line or may be separately controlled so that on-bias stress can be effectively applied to the drive transistor. The display driver circuitry may have gate driver circuits that provide different gate line signals to different rows of pixels within the display. Different rows may also have different gate driver strengths and different supplemental gate line loading structures.
Abstract:
A display may have an array of pixels each of which has a light-emitting diode such as an organic light-emitting diode. A drive transistor and an emission transistor may be coupled in series with the light-emitting diode of each pixel between a positive power supply and a ground power supply. The pixels may include first and second switching transistors. A data storage capacitor may be coupled between a gate and source of the drive transistor in each pixel. Signal lines may be provided in columns of pixels to route signals such as data signals, sensed drive currents from the drive transistors, and predetermined voltages between display driver circuitry and the pixels. The switching transistors, emission transistors, and drive transistors may include semiconducting-oxide transistors and silicon transistors and may be n-channel transistors or p-channel transistors.
Abstract:
A driver circuit configured to output a control signal to a row of display pixels is provided. The driver circuit can include a first transistor having a drain terminal coupled to a first positive power supply line, a gate terminal, and a source terminal that is coupled to an output port of the driver circuit on which the control signal is generated and a second transistor having a drain terminal coupled to the output port of the driver circuit, a gate terminal, and a source terminal that is coupled to a first ground power supply line. The first and second transistors can be coupled to a plurality of transistors coupled between a second positive power supply line and a second ground power supply line, configured to receive one or more clocks signals, and at least some of which include bottom gate terminals.
Abstract:
A display pixel may include an organic light-emitting diode, one or more emission transistors, a drive transistor, a gate setting transistor, a data loading transistor, and an initialization transistor. The drive transistor may be implemented as a semiconducting-oxide transistor to mitigate threshold voltage hysteresis to improve first frame response at high refresh rates, to reduce undesired luminance jumps at low refresh rates, and to reduce image sticking. The gate setting transistor may also be implemented as a semiconducting-oxide transistor to reduce leakage at the gate terminal of the drive transistor. The initialization transistor may also be implemented as a semiconducting-oxide transistor so that it can be controlled using a shared emission signal to reduce routing complexity. The remaining transistors in the pixel may be implemented as p-type silicon transistors. Display pixels configured in this way can support in-pixel threshold voltage compensation and on-bias stress phase to further mitigate the hysteresis.