公开(公告)号：US20090284860A1

公开(公告)日：2009-11-19

申请号：US12120525

申请日：2008-05-14

Applicant: TORU TAKEUCHI

Inventor： TORU TAKEUCHI

IPC: G11B15/18

CPC classification number: G11B5/465 ,  G11B2005/0018

Abstract: One embodiment of the invention includes a preamplifier system for a magnetic disk-drive. The system includes a current distributor configured to generate a reference current and to decay the reference current from a first magnitude to a second magnitude during a degauss period to degauss a magnetic disk write head. The degauss period defines a transition from a write cycle to a read cycle of the magnetic disk-drive and has a predetermined time duration that is independent of the first magnitude of the reference current during the write cycle. An output driver is configured to provide a write current to the magnetic disk write head having a magnitude with an absolute value that is based on the reference current.

Abstract translation: 本发明的一个实施例包括用于磁盘驱动器的前置放大器系统。 该系统包括配置成产生参考电流并且在消磁周期期间将参考电流从第一幅度衰减到第二幅值以消除磁盘写入头的电流分配器。 消磁周期定义从磁盘驱动器的写入周期到读取周期的转变，并且具有与写入周期期间的参考电流的第一幅度无关的预定持续时间。 输出驱动器被配置为向具有基于参考电流的绝对值的幅度的磁盘写入头提供写入电流。

公开(公告)号：US07532427B1

公开(公告)日：2009-05-12

申请号：US11652701

申请日：2007-01-11

Applicant: Thart Fah Voo

Inventor： Thart Fah Voo

IPC: G11B5/02 ,  G11B5/09 ,  H03F1/36 ,  H03F3/68

CPC classification number: G11B5/02 ,  G11B2005/0018 ,  H03F1/342 ,  H03F3/45475 ,  H03F2200/144 ,  H03F2200/453 ,  H03F2200/474 ,  H03F2203/45136 ,  H03F2203/45528

Abstract: An amplifier system with feedback current cancellation comprises an amplifier with at least one stage, a feedback network, first and second replica circuits, a buffer, second and third resistances, an operational amplifier (op-amp), a transistor, and a current mirror. The feedback network includes a first resistance that communicates with an input and an output of the amplifier. The first and second replica circuits approximately replicate DC characteristics of the output and the input of the amplifier, respectively. An output of the op-amp communicates with a control terminal of the transistor. The current mirror provides a current at the input of the amplifier that is proportional to a second current flowing through the transistor. The buffer communicates with the first replica circuit. The second resistance communicates with an output of the buffer. The third resistance communicates with the second resistance and with the second replica circuit.

Abstract translation: 具有反馈电流消除的放大器系统包括具有至少一个级的放大器，反馈网络，第一和第二复制电路，缓冲器，第二和第三电阻，运算放大器（运算放大器），晶体管和电流镜 。 反馈网络包括与放大器的输入和输出通信的第一电阻。 第一和第二复制电路分别大致复制放大器的输出和输入的DC特性。 运算放大器的输出与晶体管的控制端相通。 电流镜在放大器的输入处提供与流过晶体管的第二电流成比例的电流。 缓冲器与第一复制电路通信。 第二电阻与缓冲器的输出通信。 第三电阻与第二电阻和第二复制电路通信。

公开(公告)号：US07529053B1

公开(公告)日：2009-05-05

申请号：US11652202

申请日：2007-01-11

Applicant: Thart Fah Voo

Inventor： Thart Fah Voo

IPC: G11B5/02 ,  G11B5/09 ,  H03F1/36 ,  H03F3/68

CPC classification number: G11B5/02 ,  G11B2005/0018 ,  H03F1/342 ,  H03F3/45475 ,  H03F2200/144 ,  H03F2200/453 ,  H03F2200/474 ,  H03F2203/45136 ,  H03F2203/45528

Abstract: An amplifier system with feedback current cancellation comprises an amplifier, a feedback network, an operational amplifier (op-amp), and second, third, and fourth resistances. The amplifier includes an input, an output, and at least one stage. The feedback network includes a first resistance that communicates with the input and the output of the amplifier. The operational amplifier (op-amp) includes an inverting input that communicates with the input of the amplifier, a non-inverting input, and an output. The second resistance communicates with the input of the amplifier and with the output of the op-amp. The third resistance communicates with the output of the op-amp and with the non-inverting input of the op-amp. The fourth resistance communicates with the non-inverting input of the op-amp and with the output of the amplifier.

Abstract translation: 具有反馈电流消除的放大器系统包括放大器，反馈网络，运算放大器（运算放大器）以及第二，第三和第四电阻。 放大器包括输入，输出和至少一个级。 反馈网络包括与放大器的输入和输出通信的第一电阻。 运算放大器（运算放大器）包括与放大器的输入，非反相输入和输出进行通信的反相输入。 第二个电阻与放大器的输入端和运算放大器的输出端相通。 第三个电阻与运算放大器的输出以及运放的非反相输入进行通信。 第四个电阻与运算放大器的非反相输入端和放大器的输出端相通。

公开(公告)号：US20090034112A1

公开(公告)日：2009-02-05

申请号：US11831750

申请日：2007-07-31

Applicant: Motomu Hashizume

Inventor： Motomu Hashizume

IPC: G11B5/02

CPC classification number: G11B5/02 ,  G11B20/10009 ,  G11B20/10027 ,  G11B2005/0018 ,  G11B2220/2516

Abstract: Methods and apparatus to vary the input impedance of a hard disk read preamplifier are disclosed. A disclosed method amplifies a read signal from a hard disk read head based on the impedance presented by the read head and changes the impedance presented to the read head based on the gain factor.

Abstract translation: 公开了改变硬盘读前置放大器的输入阻抗的方法和装置。 所公开的方法基于由读取头呈现的阻抗，从硬盘读取头放大读取信号，并且基于增益因子改变呈现给读取头的阻抗。

公开(公告)号：US07362530B2

公开(公告)日：2008-04-22

申请号：US10982624

申请日：2004-11-06

Applicant: Motomu Hashizume

Inventor： Motomu Hashizume

IPC: G11B5/02

CPC classification number: G11B5/02 ,  G11B2005/0018 ,  H03F3/45085 ,  H03F2203/45318

Abstract: An amplifier apparatus for use with a sensor includes: (a) a first and a second amplifying circuit segment coupled with the sensor and cooperating to effect substantially balanced handling of signals received from the sensor; the first amplifying circuit segment includes a first transistor device; the second amplifying circuit segment includes a second transistor device; (b) a countercurrent unit coupled with the first and second amplifying circuit segments for receiving a first indicator signal from the first transistor device and a second indicator signal from the second transistor device; the first indicator signal represents a first parameter in the first transistor device; the second indicator signal represents a second parameter in the second transistor device; the countercurrent unit provides feedback signals to at least one of the first transistor and second transistor devices to reduce input impedance of the apparatus.

Abstract translation: 一种与传感器一起使用的放大器装置包括：（a）第一和第二放大电路段，与传感器耦合，并协调对来自传感器的信号进行实质上平衡的处理; 第一放大电路段包括第一晶体管器件; 第二放大电路段包括第二晶体管器件; （b）与第一和第二放大电路段耦合的逆流单元，用于接收来自第一晶体管器件的第一指示信号和来自第二晶体管器件的第二指示信号; 第一指示符信号表示第一晶体管器件中的第一参数; 第二指示符信号表示第二晶体管器件中的第二参数; 逆流单元向第一晶体管和第二晶体管器件中的至少一个提供反馈信号，以减少设备的输入阻抗。

公开(公告)号：US20070242384A1

公开(公告)日：2007-10-18

申请号：US11405803

申请日：2006-04-17

Applicant: John Contreras ,  Klaas Klaassen

Inventor： John Contreras ,  Klaas Klaassen

IPC: G11B5/03 ,  G11B5/02

CPC classification number: G11B5/02 ,  G11B2005/0018

Abstract: Embodiments of the present invention provide a mixed-mode amplifier for amplifying signals in data storage devices such as disk drives. In one embodiments, a circuit for amplifying data signals comprises a magnetoresistive sensor having a bias voltage applied thereto; a signal amplifier which amplifies a signal detected by the magnetoresistive sensor having the bias voltage applied thereto; a feedback control block which is coupled to an output of the signal amplifier and outputs a feedback current used to vary a loop gain of the circuit; a bias setting circuit which outputs a bias setting current; and a transimpedance amplifier which receives the bias setting current from the bias setting block and the feedback current from the feedback control block and generates the bias voltage applied to the magnetoresistive sensor.

Abstract translation: 本发明的实施例提供一种用于放大诸如磁盘驱动器的数据存储装置中的信号的混合模式放大器。 在一个实施例中，用于放大数据信号的电路包括具有施加偏置电压的磁阻传感器; 信号放大器，其放大由具有施加到其上的偏置电压的磁阻传感器检测的信号; 反馈控制块，其耦合到所述信号放大器的输出并输出用于改变所述电路的环路增益的反馈电流; 偏置设定电路，输出偏置设定电流; 以及跨阻抗放大器，其从偏置设置块接收偏置设定电流和来自反馈控制块的反馈电流，并产生施加到磁阻传感器的偏置电压。

公开(公告)号：US20070217084A1

公开(公告)日：2007-09-20

申请号：US11376014

申请日：2006-03-15

Applicant: Song Xue ,  Paul Anderson ,  Kaizhong Gao ,  Kristin Duxstad

Inventor： Song Xue ,  Paul Anderson ,  Kaizhong Gao ,  Kristin Duxstad

IPC: G11B5/127 ,  G11B5/33

CPC classification number: G11B5/3903 ,  G11B2005/0018

Abstract: A device resets a biasing magnetization of a biasing element in a magnetic sensor. The device includes a magnetic structure that is magnetically coupled to the biasing element. A conductive element is disposed around at least a portion of the magnetic structure. When a current is passed through the conductive element, a magnetic field is produced that resets the biasing magnetization of the biasing element.

Abstract translation: 器件复位磁传感器中的偏置元件的偏置磁化强度。 该装置包括磁耦合到偏压元件的磁性结构。 导电元件围绕磁性结构的至少一部分设置。 当电流通过导电元件时，产生磁场，该磁场使偏置元件的偏置磁化复位。

公开(公告)号：US07253980B1

公开(公告)日：2007-08-07

申请号：US11144096

申请日：2005-06-03

Applicant: Bac Pham ,  Xiaokun Chew

Inventor： Bac Pham ,  Xiaokun Chew

IPC: G11B5/09 ,  G11B5/02

CPC classification number: G11B5/455 ,  G11B5/02 ,  G11B5/40 ,  G11B2005/0018

Abstract: Circuitry for detecting and recording latches in read bias current may include circuitry for generating a reference voltage, a pair of current to voltage converters to convert the bias and reference currents to voltage signals, a comparator to compare those two voltages, a latch to latch the compared signal, and a counter/register to count and store the number of glitches that have been detected. It may be possible to read from the register the number of detected glitches to be used in diagnosing faults in the disk drive system. In addition, it may be possible to provide a reset input to the register to zero the counter.

Abstract translation: 用于在读取偏置电流中检测和记录锁存器的电路可以包括用于产生参考电压的电路，用于将偏置和参考电流转换为电压信号的一对电流到电压转换器，用于比较这两个电压的比较器，用于锁存 比较信号，以及计数器/寄存器来计数和存储已检测到的毛刺数。 可以从寄存器读取用于诊断磁盘驱动器系统中的故障的检测到的毛刺的数量。 此外，可以向寄存器提供复位输入以使计数器为零。

公开(公告)号：US07212385B2

公开(公告)日：2007-05-01

申请号：US11486115

申请日：2006-07-14

Applicant: Jun Hayakawa

Inventor： Jun Hayakawa

IPC: G11B5/39

CPC classification number: H01L43/08 ,  B82Y10/00 ,  B82Y25/00 ,  G01R33/093 ,  G01R33/098 ,  G11B5/39 ,  G11B5/3903 ,  G11B5/3909 ,  G11B5/3951 ,  G11B5/3967 ,  G11B5/553 ,  G11B5/59683 ,  G11B2005/0018 ,  H01F10/00 ,  H01F10/1936 ,  H01F10/3254 ,  H01F10/3263 ,  H01F10/3268

Abstract: The present invention provides a ferromagnetic tunnel magnetoresistive film which is associated with a high output and whose magnetoresistive ratio is less dependent on a bias voltage. In a three-terminal ferromagnetic tunnel magnetoresistive element, a decrease in an output is suppressed by a bias voltage V1 applied to one of the tunnel junctions. By employing half-metallic ferromagnets 11 and 12 in the element, the output can be enhanced and the dependency on the applied bias voltage can be reduced.

Abstract translation: 本发明提供一种铁磁隧道磁阻膜，其与高输出相关联，并且其磁阻比不太依赖于偏置电压。 在三端铁磁隧道磁阻元件中，通过施加到一个隧道结的偏置电压V 1 1来抑制输出的减小。 通过在元件中采用半金属铁磁体11和12，可以提高输出，并且可以降低对所施加的偏置电压的依赖性。

公开(公告)号：US07206155B2

公开(公告)日：2007-04-17

申请号：US10955424

申请日：2004-09-30

Applicant: Jeremy Kuehlwein ,  Raymond E. Barnett

Inventor： Jeremy Kuehlwein ,  Raymond E. Barnett

IPC: G11B5/02

CPC classification number: G11B5/39 ,  G11B2005/0018

Abstract: A write driver circuit (38) uses a matching resistors (R0, R1) to match the impedance of the head (32) disposed between output nodes (OUTP, OUTN). Control circuitry (Q4, Q5, Q6, Q7, R2, R4, R6 and R7) maintains the voltage at reference voltage nodes (VREFP, REFN) at essentially the same voltage as its corresponding output node. The matching resistor is disposed between the reference voltage node and the output node along with a driver (40a, 40b), which may be implemented as an AB driver. Since the voltage between the reference node and the output node is generally zero, very little current is shunted by the matching resistors, and thus, there is very little power wasted by the matching resistors. In the preferred embodiment, the output transistors of the AB drivers are driven by switched current sources (Q28 and Q29) to provide enhanced current to the bases of the output transistors on an as needed basis.

Abstract translation: 写入驱动器电路（38）使用匹配电阻器（R 0，R 1）来匹配设置在输出节点（OUTP，OUTN）之间的头部（32）的阻抗。 控制电路（Q 4，Q 5，Q 6，Q 7，R 2，R 4，R 6和R 7）将参考电压节点（VREFP，REFN）的电压保持在与其相应输出节点基本相同的电压。 匹配电阻器与可以被实现为AB驱动器的驱动器（40a，40b）一起设置在参考电压节点和输出节点之间。 由于参考节点和输出节点之间的电压通常为零，所以匹配电阻器分流的电流非常小，因此匹配电阻器浪费的功率非常小。 在优选实施例中，AB驱动器的输出晶体管由开关电流源（Q28和Q29）驱动，以根据需要向输出晶体管的基极提供增强的电流。