Abstract:
The present invention provides a current-sense bias circuit for use with a magnetoresistive head. In one embodiment, the current-sense bias circuit includes a voltage biasing portion configured to provide a bias voltage across the magnetoresistive head thereby establishing a bias current through the magnetoresistive head. Additionally, the current-sense bias circuit also includes a current sensing portion coupled to the voltage biasing portion and configured to sense a change in the bias current based on a resistivity change of the magnetoresistive head.
Abstract:
An apparatus for driving a write head in response to a data signal includes: (a) a first drive unit coupled with the write head; (b) a second drive unit coupled with the write head; and (c) a control unit coupled with the first and second drive units. The control unit receives the data signal and generates control signals to the first drive and second drive units in response to the data signal. The control signals control the first drive unit to apply a first drive signal to a first write head side in a first signal polarity and control the second drive unit to apply a second drive signal to the a second write head side in a second signal polarity opposite to the first signal polarity when the data signal effects a signal excursion. The first drive signal and the second drive signal are equal in magnitude time coincident.
Abstract:
Modem comprising a delta modulation (DM) encoder and a DM decoder which has noise-reducing capability in the demodulation of encoded binary pulse signals representative of constant amplitude signals. The DM decoder includes a 1-click delay circuit operable in conjunction with a logic circuit and an integrator to produce a demodulated output signal which is the same as the preceding signal when the input signals to the DM encoder are constant amplitude signals, thereby eliminating are substantially reducing granular noise arising from a constant analog input to the modem without requiring a special filter. The logic circuit of the DM decoder may be an exclusive NOR gate which compares the 1-clock delayed binary pulse signal with the binary pulse signal and provides a control signal output based upon the comparison. The control signal output from the exclusive NOR gate controls the output of the integrator and enables the integrator to produce a substantially noise-free demodulated output signal.
Abstract:
A disk drive controller including a preamplifier and a controller is disclosed, in which communications between the controller and the preamplifier are carried out over at least some shared terminals and conductors. A first pair of differential lines is provided to communicate data, sensed at read/write heads of the disk drive, from the preamplifier to the controller, and a second pair of differential lines communicates data to be written to the disk drive from the controller to the preamplifier. Control signals are communicated over a serial interface between the controller and preamplifier, over the first pair of differential lines, so that serial communication can be carried out simultaneously with the writing of data from the controller to the preamplifier. Alternatively, the control signals are communicated over the second pair of differential lines, simultaneously with the reading of data from the preamplifier to the controller.
Abstract:
Methods and apparatus to perform hard-disk drive head proximity detection in a preamplifier are described. One example method of detecting head position in a hard-disk drive includes obtaining a read signal from a head reading information from a disk; determining a signal envelope of the read signal; comparing the signal envelope to a first threshold to produce a first comparison; filtering the signal envelope; comparing the filtered signal envelope to a second threshold to produce a second comparison; combining the first comparison and the second comparison; and determining if the combination of the first comparison and the second comparison indicates head position oscillation.
Abstract:
A disk drive controller including a preamplifier and a controller is disclosed, in which communications between the controller and the preamplifier are carried out over at least some shared terminals and conductors. A first pair of differential lines is provided to communicate data, sensed at read/write heads of the disk drive, from the preamplifier to the controller, and a second pair of differential lines communicates data to be written to the disk drive from the controller to the preamplifier. Control signals are communicated over a serial interface between the controller and preamplifier, over the first pair of differential lines, so that serial communication can be carried out simultaneously with the writing of data from the controller to the preamplifier. Alternatively, the control signals are communicated over the second pair of differential lines, simultaneously with the reading of data from the preamplifier to the controller.
Abstract:
A system and method of the companion chip monitoring the active head chip over the conventional 4 wire structure, including when the active head chip goes into a sleep state. Advantageously, the companion chip remains operational and detects changes of the voltage on the DX and DY line, even when the active head chip determines a fault and goes into a sleep state. Further, the companion chip can determine which fault was detected by the active head chip using a read back function, such as analyzing an internal register of the active head chip.
Abstract:
Methods and apparatus to control head expansion in multi-head hard-disk drives are disclosed. An example control system for use in a multi-head hard-disk drive includes a first sensor to provide a first feedback signal indicating a status of a first head; a second sensor to provide a second feedback signal indicating a status of a second head; and a shared calculation unit to selectively receive one of the first and second feedback signals for a feedback process to control an expansion of the first and second heads.
Abstract:
Methods and apparatus to vary the input impedance of a hard disk read preamplifier are disclosed. A disclosed method amplifies a read signal from a hard disk read head based on the impedance presented by the read head and changes the impedance presented to the read head based on the gain factor.
Abstract:
Resistivity sense bias circuits are described herein. An example resistivity sense bias circuit for use with a magnetoresistive read head includes a current biasing portion configured to provide a bias current across the magnetoresistive read head thereby establishing a bias voltage across the magnetoresistive read head, a resistivity sensing portion coupled to the current biasing portion and configured to sense a change in the bias current based on a resistivity change of the magnetoresistive read head, and a voltage source to provide the bias voltage and to adjust the bias voltage in response to the resistivity change of the magnetoresistive read head.