Current-sense bias circuit for a magnetoresistive head and method of sensing a current therethrough
    1.
    发明授权
    Current-sense bias circuit for a magnetoresistive head and method of sensing a current therethrough 有权
    用于磁阻头的电流检测偏置电路和感测电流通过其中的电流的方法

    公开(公告)号:US07251091B2

    公开(公告)日:2007-07-31

    申请号:US10748985

    申请日:2003-12-30

    CPC classification number: G11B5/012 G11B5/02 G11B2005/0018

    Abstract: The present invention provides a current-sense bias circuit for use with a magnetoresistive head. In one embodiment, the current-sense bias circuit includes a voltage biasing portion configured to provide a bias voltage across the magnetoresistive head thereby establishing a bias current through the magnetoresistive head. Additionally, the current-sense bias circuit also includes a current sensing portion coupled to the voltage biasing portion and configured to sense a change in the bias current based on a resistivity change of the magnetoresistive head.

    Abstract translation: 本发明提供一种与磁阻头一起使用的电流检测偏置电路。 在一个实施例中,电流检测偏置电路包括电压偏置部分,其被配置为在磁阻磁头两端提供偏置电压,从而建立通过磁阻头的偏置电流。 另外,电流检测偏置电路还包括耦合到电压偏置部分并被配置为基于磁阻头的电阻率变化来感测偏置电流的变化的电流感测部分。

    Apparatus and method for driving a write head
    2.
    发明授权
    Apparatus and method for driving a write head 有权
    用于驱动写入头的装置和方法

    公开(公告)号:US07184232B2

    公开(公告)日:2007-02-27

    申请号:US10665324

    申请日:2003-09-18

    CPC classification number: G11B5/09

    Abstract: An apparatus for driving a write head in response to a data signal includes: (a) a first drive unit coupled with the write head; (b) a second drive unit coupled with the write head; and (c) a control unit coupled with the first and second drive units. The control unit receives the data signal and generates control signals to the first drive and second drive units in response to the data signal. The control signals control the first drive unit to apply a first drive signal to a first write head side in a first signal polarity and control the second drive unit to apply a second drive signal to the a second write head side in a second signal polarity opposite to the first signal polarity when the data signal effects a signal excursion. The first drive signal and the second drive signal are equal in magnitude time coincident.

    Abstract translation: 一种用于响应于数据信号驱动写入头的装置包括:(a)与写入头耦合的第一驱动单元; (b)与写入头耦合的第二驱动单元; 和(c)与第一和第二驱动单元相连的控制单元。 控制单元接收数据信号,并根据数据信号产生控制信号给第一驱动单元和第二驱动单元。 控制信号控制第一驱动单元以第一信号极性将第一驱动信号施加到第一写头侧,并且控制第二驱动单元以与第二驱动单元相反的第二信号极性向第二写头侧施加第二驱动信号 当数据信号影响信号偏移时,到第一个信号极性。 第一驱动信号和第二驱动信号的幅度时间相等。

    Modem with noise-reducing decoder in demodulation of encoded binary
pulse signals representative of constant amplitude signals
    3.
    发明授权
    Modem with noise-reducing decoder in demodulation of encoded binary pulse signals representative of constant amplitude signals 失效
    调制解调器具有降噪解码器解调编码的二进制脉冲信号,代表恒定幅度信号

    公开(公告)号:US4958158A

    公开(公告)日:1990-09-18

    申请号:US184318

    申请日:1988-04-21

    CPC classification number: H03M3/02

    Abstract: Modem comprising a delta modulation (DM) encoder and a DM decoder which has noise-reducing capability in the demodulation of encoded binary pulse signals representative of constant amplitude signals. The DM decoder includes a 1-click delay circuit operable in conjunction with a logic circuit and an integrator to produce a demodulated output signal which is the same as the preceding signal when the input signals to the DM encoder are constant amplitude signals, thereby eliminating are substantially reducing granular noise arising from a constant analog input to the modem without requiring a special filter. The logic circuit of the DM decoder may be an exclusive NOR gate which compares the 1-clock delayed binary pulse signal with the binary pulse signal and provides a control signal output based upon the comparison. The control signal output from the exclusive NOR gate controls the output of the integrator and enables the integrator to produce a substantially noise-free demodulated output signal.

    Abstract translation: 调制解调器包括增量调制(DM)编码器和DM解码器,其在解调表示恒定幅度信号的编码二进制脉冲信号中具有降噪能力。 DM解码器包括可与逻辑电路和积分器结合操作的一键延迟电路,以产生与前述信号相同的解调输出信号,当DM编码器的输入信号为恒定振幅信号时,消除 大大减少了从调制解调器的恒定模拟输入引起的颗粒噪声,而不需要特殊的滤波器。 DM解码器的逻辑电路可以是异或门,其将1时钟延迟二进制脉冲信号与二进制脉冲信号进行比较,并且基于该比较提供控制信号输出。 从异或门输出的控制信号控制积分器的输出,使积分器产生基本无噪声的解调输出信号。

    Hard disk drive preamplifier with reduced pin count
    4.
    发明授权
    Hard disk drive preamplifier with reduced pin count 有权
    硬盘驱动器前置放大器,引脚数减少

    公开(公告)号:US07715136B2

    公开(公告)日:2010-05-11

    申请号:US11733027

    申请日:2007-04-09

    Inventor: Motomu Hashizume

    CPC classification number: G11B5/09

    Abstract: A disk drive controller including a preamplifier and a controller is disclosed, in which communications between the controller and the preamplifier are carried out over at least some shared terminals and conductors. A first pair of differential lines is provided to communicate data, sensed at read/write heads of the disk drive, from the preamplifier to the controller, and a second pair of differential lines communicates data to be written to the disk drive from the controller to the preamplifier. Control signals are communicated over a serial interface between the controller and preamplifier, over the first pair of differential lines, so that serial communication can be carried out simultaneously with the writing of data from the controller to the preamplifier. Alternatively, the control signals are communicated over the second pair of differential lines, simultaneously with the reading of data from the preamplifier to the controller.

    Abstract translation: 公开了一种包括前置放大器和控制器的磁盘驱动器控制器,其中控制器和前置放大器之间的通信在至少一些共享终端和导体上进行。 提供第一对差分线以将从磁盘驱动器的读/写头感测的数据从前置放大器传送到控制器,并且第二对差分线将要写入磁盘驱动器的数据从控制器传送到 前置放大器。 控制信号通过控制器和前置放大器之间的串行接口通过第一对差分线路进行通信,从而可以在将数据从控制器写入前置放大器的同时进行串行通信。 或者,在将数据从前置放大器读取到控制器的同时,通过第二对差分线路传送控制信号。

    Methods and apparatus to perform hard-disk drive head proximity detection in a preamplifier
    5.
    发明授权
    Methods and apparatus to perform hard-disk drive head proximity detection in a preamplifier 有权
    在前置放大器中执行硬盘驱动器头部接近检测的方法和装置

    公开(公告)号:US07639442B2

    公开(公告)日:2009-12-29

    申请号:US11848849

    申请日:2007-08-31

    CPC classification number: G11B5/56

    Abstract: Methods and apparatus to perform hard-disk drive head proximity detection in a preamplifier are described. One example method of detecting head position in a hard-disk drive includes obtaining a read signal from a head reading information from a disk; determining a signal envelope of the read signal; comparing the signal envelope to a first threshold to produce a first comparison; filtering the signal envelope; comparing the filtered signal envelope to a second threshold to produce a second comparison; combining the first comparison and the second comparison; and determining if the combination of the first comparison and the second comparison indicates head position oscillation.

    Abstract translation: 描述了在前置放大器中执行硬盘驱动器头部邻近检测的方法和装置。 检测硬盘驱动器中的磁头位置的一种示例性方法包括从磁头读取信息获得读取信号; 确定读信号的信号包络; 将信号包络与第一阈值进行比较以产生第一比较; 过滤信号包络; 将经滤波的信号包络与第二阈值进行比较以产生第二比较; 结合第一次比较和第二次比较; 以及确定第一比较和第二比较的组合是否指示头位置振荡。

    Hard Disk Drive Preamplifier with Reduced Pin Count
    6.
    发明申请
    Hard Disk Drive Preamplifier with Reduced Pin Count 有权
    具有减少引脚数的硬盘驱动器前置放大器

    公开(公告)号:US20070236819A1

    公开(公告)日:2007-10-11

    申请号:US11733027

    申请日:2007-04-09

    Inventor: Motomu Hashizume

    CPC classification number: G11B5/09

    Abstract: A disk drive controller including a preamplifier and a controller is disclosed, in which communications between the controller and the preamplifier are carried out over at least some shared terminals and conductors. A first pair of differential lines is provided to communicate data, sensed at read/write heads of the disk drive, from the preamplifier to the controller, and a second pair of differential lines communicates data to be written to the disk drive from the controller to the preamplifier. Control signals are communicated over a serial interface between the controller and preamplifier, over the first pair of differential lines, so that serial communication can be carried out simultaneously with the writing of data from the controller to the preamplifier. Alternatively, the control signals are communicated over the second pair of differential lines, simultaneously with the reading of data from the preamplifier to the controller.

    Abstract translation: 公开了一种包括前置放大器和控制器的磁盘驱动器控制器,其中控制器和前置放大器之间的通信在至少一些共享终端和导体上进行。 提供第一对差分线以将从磁盘驱动器的读/写头感测的数据从前置放大器传送到控制器,并且第二对差分线将要写入磁盘驱动器的数据从控制器传送到 前置放大器。 控制信号通过控制器和前置放大器之间的串行接口通过第一对差分线路进行通信,从而可以在将数据从控制器写入前置放大器的同时进行串行通信。 或者,在将数据从前置放大器读取到控制器的同时,通过第二对差分线路传送控制信号。

    Active head fault detection scheme
    7.
    发明申请
    Active head fault detection scheme 审中-公开
    有源头故障检测方案

    公开(公告)号:US20070153413A1

    公开(公告)日:2007-07-05

    申请号:US11323790

    申请日:2005-12-30

    CPC classification number: G11B5/455

    Abstract: A system and method of the companion chip monitoring the active head chip over the conventional 4 wire structure, including when the active head chip goes into a sleep state. Advantageously, the companion chip remains operational and detects changes of the voltage on the DX and DY line, even when the active head chip determines a fault and goes into a sleep state. Further, the companion chip can determine which fault was detected by the active head chip using a read back function, such as analyzing an internal register of the active head chip.

    Abstract translation: 包括当有源头芯片进入睡眠状态时,伴随芯片监视有源头芯片的系统和方法。 有利地,伴随的芯片保持运行,并且检测DX和DY线路上的电压的变化,即使当有源头部芯片确定故障并进入睡眠状态时。 此外,伴随芯片可以使用回读功能来确定主动头芯片检测到哪个故障,例如分析有源头芯片的内部寄存器。

    METHODS AND APPARATUS TO CONTROL HEAD EXPANSION IN MULTI-HEAD HARD-DISK DRIVES
    8.
    发明申请
    METHODS AND APPARATUS TO CONTROL HEAD EXPANSION IN MULTI-HEAD HARD-DISK DRIVES 审中-公开
    用于控制多头硬盘驱动器中的头部扩展的方法和装置

    公开(公告)号:US20090154002A1

    公开(公告)日:2009-06-18

    申请号:US12146934

    申请日:2008-06-26

    CPC classification number: G11B5/40 G11B5/455 G11B5/6064 G11B5/607

    Abstract: Methods and apparatus to control head expansion in multi-head hard-disk drives are disclosed. An example control system for use in a multi-head hard-disk drive includes a first sensor to provide a first feedback signal indicating a status of a first head; a second sensor to provide a second feedback signal indicating a status of a second head; and a shared calculation unit to selectively receive one of the first and second feedback signals for a feedback process to control an expansion of the first and second heads.

    Abstract translation: 公开了用于控制多头硬盘驱动器中的磁头扩展的方法和装置。 用于多头硬盘驱动器的示例性控制系统包括:第一传感器,用于提供指示第一头部状态的第一反馈信号; 第二传感器,用于提供指示第二头的状态的第二反馈信号; 以及共享计算单元,用于选择性地接收所述第一和第二反馈信号之一用于反馈处理,以控制所述第一和第二磁头的扩展。

    METHODS AND APPARATUS TO VARY INPUT IMPEDANCE OF A HARD DISK DRIVE READ PREAMPLIFIER
    9.
    发明申请
    METHODS AND APPARATUS TO VARY INPUT IMPEDANCE OF A HARD DISK DRIVE READ PREAMPLIFIER 审中-公开
    硬盘驱动器读取前置放大器的变化输入阻抗的方法和设备

    公开(公告)号:US20090034112A1

    公开(公告)日:2009-02-05

    申请号:US11831750

    申请日:2007-07-31

    Inventor: Motomu Hashizume

    Abstract: Methods and apparatus to vary the input impedance of a hard disk read preamplifier are disclosed. A disclosed method amplifies a read signal from a hard disk read head based on the impedance presented by the read head and changes the impedance presented to the read head based on the gain factor.

    Abstract translation: 公开了改变硬盘读前置放大器的输入阻抗的方法和装置。 所公开的方法基于由读取头呈现的阻抗,从硬盘读取头放大读取信号,并且基于增益因子改变呈现给读取头的阻抗。

    RESISTIVITY SENSE BIAS CIRCUITS AND METHODS OF OPERATING THE SAME
    10.
    发明申请
    RESISTIVITY SENSE BIAS CIRCUITS AND METHODS OF OPERATING THE SAME 有权
    电阻感测偏差电路及其操作方法

    公开(公告)号:US20080278859A1

    公开(公告)日:2008-11-13

    申请号:US11747681

    申请日:2007-05-11

    CPC classification number: G11B5/59683 G11B5/02 G11B2005/0008

    Abstract: Resistivity sense bias circuits are described herein. An example resistivity sense bias circuit for use with a magnetoresistive read head includes a current biasing portion configured to provide a bias current across the magnetoresistive read head thereby establishing a bias voltage across the magnetoresistive read head, a resistivity sensing portion coupled to the current biasing portion and configured to sense a change in the bias current based on a resistivity change of the magnetoresistive read head, and a voltage source to provide the bias voltage and to adjust the bias voltage in response to the resistivity change of the magnetoresistive read head.

    Abstract translation: 本文描述了电阻率检测偏置电路。 用于磁阻读取头的示例电阻率检测偏置电路包括电流偏置部分,其被配置为在磁阻读取头两端提供偏置电流,从而在磁阻读取头两端建立偏置电压,耦合到电流偏置部分的电阻率检测部分 并且被配置为基于磁阻读取头的电阻率变化和电压源来感测偏置电流的变化,以提供偏置电压并且响应于磁阻读取头的电阻率变化来调整偏置电压。

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