公开(公告)号：US11088352B2

公开(公告)日：2021-08-10

申请号：US16429531

申请日：2019-06-03

Applicant: BOE Technology Group Co., Ltd.

Inventor： Wenqu Liu ,  Feng Zhang ,  Qi Yao ,  Zhijun Lv ,  Liwen Dong ,  Shizheng Zhang ,  Ning Dang ,  Xiaoxin Song ,  Zhao Cui

IPC: H01L51/52 ,  H01L51/56 ,  H01L27/32 ,  H01L51/00

Abstract: A display substrate, a manufacturing method thereof, and a display device are provided, in the field of display technology. The display substrate includes a base substrate, and a thin-film transistor, a light-emitting device, an encapsulation structure, and a conductive film layer sequentially disposed on the base substrate in a direction away from the base substrate. Since the display substrate includes a conductive film layer on a side of the encapsulation structure away from the base substrate, when the protective film layer on the side of the conductive film layer away from the base substrate is peeled off, static electricity generated by the separation of the film layer can be released to the conductive film layer, avoiding electron transition to the active layer of the thin-film transistor in the display substrate to cause offset of the threshold voltage of the thin-film transistor. The display brightness uniformity of the display substrate can be ensured.

公开(公告)号：US20210225975A1

公开(公告)日：2021-07-22

申请号：US16765232

申请日：2019-11-26

Applicant: BOE TECHNOLOGY GROUP CO., LTD.

Inventor： Yanan Niu ,  Jiushi Wang ,  Zhanfeng Cao ,  Qi Yao ,  Feng Zhang ,  Wusheng Li ,  Feng Guan ,  Lei Chen ,  Hongwei Tian

IPC: H01L27/32

Abstract: A display substrate is provided. The display substrate includes a substrate (1), a first transistor (2) and a second transistor (3) on the substrate (1), directions of intrinsic threshold voltage shifts of the first transistor (2) and the second transistor (3) being opposite; and a shift adjustment structure (4) on the substrate (1). The shift adjustment structure (4) may be configured to input adjustment signals to the first transistor (2) and the second transistor (3) respectively to make threshold voltages of the first transistor (2) and the second transistor (3) shift in directions opposite to the directions of their intrinsic threshold voltage shifts respectively.

公开(公告)号：US20210202648A1

公开(公告)日：2021-07-01

申请号：US16071681

申请日：2017-12-11

Applicant: BOE TECHNOLOGY GROUP CO., LTD.

Inventor： Feng Zhang ,  Zhijun Lv ,  Wenqu Liu ,  Liwen Dong ,  Shizheng Zhang ,  Ning Dang ,  Zhiyong Liu

IPC: H01L27/32 ,  H01L29/786

Abstract: The present application discloses an array substrate having a plurality of first thin film transistors and a plurality of second thin film transistors. Each of the plurality of first thin film transistors includes a silicon active layer. The array substrate includes a base substrate; a silicon layer having a plurality of silicon active layers respectively for the plurality of first thin film transistors; and a UV absorption layer on a side of the silicon layer distal to the base substrate, and including a plurality of UV absorption blocks. Each of the plurality of UV absorption blocks is on a side of the one of the plurality of silicon active layers distal to the base substrate, and is insulated from the one of the plurality of silicon active layers.

公开(公告)号：US10910498B2

公开(公告)日：2021-02-02

申请号：US14772876

申请日：2014-11-21

Applicant: BOE Technology Group Co., Ltd.

Inventor： Zhanfeng Cao ,  Feng Zhang ,  Qi Yao

IPC: H01L29/786 ,  H01L27/12 ,  H01L29/423 ,  H01L29/45 ,  H01L29/49 ,  H01L29/66 ,  H01L21/311 ,  H01L21/3105 ,  H01L21/027

Abstract: An array substrate, a method for fabricating the same and a display device are disclosed. The method for fabricating the array substrate includes: forming a pattern of a gate electrode, a pattern of a gate insulation layer and a pattern of a metal oxide semiconductor active layer on a base substrate; forming an etch stop layer; forming a pattern of a pixel electrode first, and then forming a pattern of a source electrode and a pattern of a drain electrode; wherein the pattern of the pixel electrode is connected to the pattern of the metal oxide semiconductor active layer through the pattern of the source electrode or the pattern of the drain electrode. The method can prevent the problem that the pattern of the pixel electrode failing to connect to the pattern of the source electrode or the pattern of the drain electrode.

公开(公告)号：US20210013153A1

公开(公告)日：2021-01-14

申请号：US16070271

申请日：2017-12-14

Applicant: BOE Technology Group Co., Ltd.

Inventor： Qi Yao ,  Zhanfeng Cao ,  Feng Zhang ,  Jiushi Wang

IPC: H01L23/552 ,  H01L27/12

Abstract: In embodiments of the present disclosure, there is provided a display substrate assembly including: a base substrate; a light shielding layer on the base substrate; and an active layer of a thin film transistor, above the base substrate. An orthographic projection of the active layer on the base substrate in a thickness direction of the base substrate is within an orthographic projection of the light shielding layer on the base substrate in the thickness direction of the base substrate, and the light shielding layer includes an ion-doped amorphous silicon layer. In embodiments of the present disclosure, there is also provided a method of manufacturing a display substrate assembly and a display apparatus including the display substrate assembly.

公开(公告)号：US10386724B2

公开(公告)日：2019-08-20

申请号：US15313910

申请日：2015-09-29

Applicant: BOE Technology Group Co., Ltd.

Inventor： Bin Zhang ,  Tingting Zhou ,  Feng Zhang ,  Wei Zhang ,  Jincheng Gao

IPC: G03F7/40 ,  G03F7/038 ,  G03F7/039 ,  G03F7/16 ,  G03F7/20 ,  G03F7/26 ,  H01L33/00 ,  H01L33/06 ,  H01L33/28 ,  H01L33/30 ,  H01L51/00 ,  H01L51/50

Abstract: A photoresist, a patterning method of a quantum dot layer, a QLED, a quantum dot color filter and a display device are disclosed, which can solve the problem that current patterning methods destroy quantum dots. The patterning method of a quantum dot layer includes the steps of: forming a hydrophilic photoresist pattern which comprises forming a photoresist material layer on a substrate by using a photoresist, patterning the photoresist material layer to form a photoresist pattern, and subjecting the photoresist to hydrophilic treatment; applying quantum dots; removing the quantum dots retained on the photoresist pattern; and stripping the photoresist pattern. The patterning method of a quantum dot layer in the present disclosure can improve the hydrophilic performance of the photoresist and reduce the adhesion of the lipophilic quantum dots on the photoresist.

公开(公告)号：US20190096969A1

公开(公告)日：2019-03-28

申请号：US15989014

申请日：2018-05-24

Applicant: BOE TECHNOLOGY GROUP CO., LTD.

Inventor： Feng Zhang ,  Wenqu Liu ,  Zhijun Lv ,  Liwen Dong ,  Shizheng Zhang ,  Ning Dang

IPC: H01L27/32 ,  H01L51/56 ,  H01L51/00 ,  H01L51/52 ,  H01L51/50

Abstract: The present disclosure provides a method for manufacturing an OLED display substrate, including a step of forming a pattern of a pixel definition layer on a substrate through a patterning process. A bottom wall of the pixel definition layer is formed on the substrate, a top wall of the pixel definition layer is arranged parallel to the bottom wall, and a side wall of the pixel definition layer is angled relative to the top wall at an acute angle.

公开(公告)号：US20190011772A1

公开(公告)日：2019-01-10

申请号：US15745062

申请日：2017-08-17

Applicant: BOE Technology Group Co., Ltd.

Inventor： Qi Yao ,  Zhanfeng Cao ,  Feng Zhang ,  Haixu Li ,  Shengguang Ban ,  Yingwei Liu

IPC: G02F1/1335 ,  G02F1/1368 ,  H01L27/12 ,  G02F1/1362 ,  H01L21/02 ,  H01L21/3065 ,  H01L29/786

Abstract: An array substrate and a manufacturing method thereof, and a display device are provided. The array substrate includes: a base substrate, an active layer, and a first polarization structure. The active layer is disposed on the base substrate; the first polarization structure is disposed on a side of the active layer facing the base substrate, and an orthographic projection of the first polarization structure on the base substrate is at least partially overlapped with an orthographic projection of the active layer on the base substrate.

公开(公告)号：US09806110B2

公开(公告)日：2017-10-31

申请号：US14803481

申请日：2015-07-20

Applicant: BOE TECHNOLOGY GROUP CO., LTD.

Inventor： Guanbao Hui ,  Seungjin Choi ,  Weifeng Zhou ,  Feng Zhang

IPC: G02F1/1333 ,  H01L27/12 ,  G02F1/1335 ,  G02F1/1368

CPC classification number: H01L27/1288 ,  G02F1/133345 ,  G02F1/133555 ,  G02F1/1368 ,  H01L27/1218 ,  H01L27/124 ,  H01L27/1262

Abstract: An embodiment of the disclosed technology provides a pixel structure, comprising a TFT, a reflective region and a transmissive region, wherein the reflective region comprises a reflective region insulation layer, a reflection layer on the reflective region insulation layer and a reflective region pixel electrode on the reflection layer, and the transmissive region comprises a transmissive region pixel electrode, wherein the reflective region pixel electrode and the transmissive region pixel electrode form an integral structure, and the integral structure of the pixel electrodes is connected with the drain electrode of the TFT, wherein the organic layer in the reflective region is formed on an array substrate prior to a gate electrode of the TFT, and the reflection layer in the reflective region and the gate electrode of the TFT are formed in a same patterning process by using a same metal layer.

公开(公告)号：US20170243979A1

公开(公告)日：2017-08-24

申请号：US15151396

申请日：2016-05-10

Applicant: BOE Technology Group Co., Ltd.

Inventor： Tianming DAI ,  Oi Yao ,  Feng Zhang ,  Zhangeng Cao

IPC: H01L29/786 ,  H01L29/24 ,  H01L27/12 ,  H01L29/22

CPC classification number: H01L29/78606 ,  H01L21/02304 ,  H01L21/02365 ,  H01L21/76841 ,  H01L21/8234 ,  H01L27/1225 ,  H01L27/127 ,  H01L27/1288 ,  H01L29/22 ,  H01L29/24 ,  H01L29/66742 ,  H01L29/66969 ,  H01L29/78618 ,  H01L29/7869 ,  H01L29/78696

Abstract: An array substrate and a display device are provided. A gate insulating layer and a gate electrode are formed on a semiconductor layer in sequence, the gate insulating layer and the gate electrode are located in a middle position of the semiconductor layer and have a uniform shape and size. In a region on the semiconductor layer that is not covered by the gate insulating layer, there is further provided a metal diffusion layer. A barrier layer includes a portion covering the gate insulating layer and the gate electrode and a portion located around the semiconductor layer. A passivation layer covers the semiconductor layer, the gate insulating layer, the gate electrode and the barrier layer. Source and drain electrodes are connected to the metal diffusion layer respectively, and a pixel electrode contacts with the drain electrode.