ELECTRONIC SYSTEM FOR MANAGING AN ELECTRIC BATTERY

    公开(公告)号:US20170104351A1

    公开(公告)日:2017-04-13

    申请号:US15290099

    申请日:2016-10-11

    Abstract: An assembly including a battery and a management system, wherein: the battery includes at least three stages in series between a negative terminal and a positive terminal of the battery; and the management system includes: at least two first voltage sensors each having first and second measurement nodes connected by at least two consecutive stages of the battery, said first sensors being arranged so that each stage has its positive terminal connected to one of the first sensors, and does not have its negative terminal connected to the same first sensor; and at least one second voltage sensor having first and second measurement nodes respectively coupled to the positive terminal and to the negative terminal of a same stage of the battery.

    STATIC RANDOM ACCESS MEMORY
    98.
    发明申请
    STATIC RANDOM ACCESS MEMORY 审中-公开
    静态随机存取存储器

    公开(公告)号:US20160372180A1

    公开(公告)日:2016-12-22

    申请号:US15160968

    申请日:2016-05-20

    CPC classification number: G11C11/419 G11C5/14 G11C7/12 G11C11/412

    Abstract: The invention concerns a static random access memory (SRAM) comprising: a plurality of memory cells each having a pair of cross-coupled inverters (102, 104), a first of the inverters (102) being supplied by first and second power supply rails (VDD, VSS) and a second of the inverters (104) being supplied by third and fourth supply rails (114, 116), an input of the second inverter (102) being coupled to a first bit line (BL, WBL) via a first transistor (118); and a power supply circuit (120) adapted to apply a first voltage difference (VDD) across the first and second power supply rails (VDD, VSS) and a second voltage difference (VDH, VSL) across the third and fourth power supply rails (114, 116), the second voltage difference being greater than the first voltage difference.

    Abstract translation: 本发明涉及一种静态随机存取存储器(SRAM),包括:多个存储单元,每个存储单元具有一对交叉耦合的反相器(102,104),第一反相器(102)由第一和第二电源轨 (VDD,VSS)和第二反相器(104)由第三和第四电源轨(114,116)提供,第二反相器(102)的输入通过第一位线(BL,WBL)经由 第一晶体管(118); 以及电源电路(120),其适于跨越所述第一和第二电源轨(VDD,VSS)施加第一电压差(VDD),并且跨越所述第三和第四电源轨(...)施加第二电压差(VDH,VSL) 114,116),所述第二电压差大于所述第一电压差。

    Method for Fabricating a Photovoltaic Cell
    99.
    发明申请
    Method for Fabricating a Photovoltaic Cell 审中-公开
    制造光伏电池的方法

    公开(公告)号:US20160247960A1

    公开(公告)日:2016-08-25

    申请号:US15028078

    申请日:2014-10-14

    Abstract: A method for producing a photovoltaic cell including the following successive steps: i) providing a substrate including a p/n photovoltaic junction, successively covered by a transparent conductive oxide layer, a first layer made from electrically insulating material and a second layer made from metallic material; ii) performing localised heat treatment by laser irradiation under conditions enabling the electrically insulating material and the metallic material to be made to react locally to form a seed layer, made from a metal-charged glassy compound, the seed layer being electrically connected to the p/n junction by way of the transparent conductive oxide layer; iii) performing removal of the second layer of metallic material; iv) performing formation of an electric contact on the seed layer by electrochemical deposition.

    Abstract translation: 一种用于制造光伏电池的方法,包括以下连续步骤:i)提供包括由透明导电氧化物层连续覆盖的ap / n光伏结的衬底,由电绝缘材料制成的第一层和由金属材料制成的第二层 ; ii)在使得电绝缘材料和金属材料能够局部反应以形成由金属带电的玻璃化合物制成的种子层的条件下,通过激光照射进行局部热处理,种子层电连接到p / n结,通过透明导电氧化物层; iii)执行第二层金属材料的去除; iv)通过电化学沉积在种子层上形成电接触。

    Pixel processing circuitry
    100.
    发明授权
    Pixel processing circuitry 有权
    像素处理电路

    公开(公告)号:US09402044B2

    公开(公告)日:2016-07-26

    申请号:US14390745

    申请日:2013-04-04

    CPC classification number: H04N5/378 H04N5/335 H04N5/347 H04N5/374

    Abstract: The invention concerns a method of processing pixel values comprising: during a first read phase, generating a first digital value as a function of pixel values by controlling, based on first and second control signals and a first set of increment rates, the rate that a first counter (220-i) is incremented; and during a second read phase, generating a second digital value as a function of pixel values by controlling, based on first and second control signals and a second set of increment rates, the rate that said first counter (220-i) is incremented, the first and second sets of increment rates each defining an increment rate for each of a plurality of states of the first and second control signals, wherein said first set of increment rates is different from said second set of increment rates.

    Abstract translation: 本发明涉及一种处理像素值的方法,包括:在第一读取阶段期间,通过基于第一和第二控制信号和第一组递增速率来控制基于像素值的函数的速率,生成作为像素值的函数的第一数字值 第一计数器(220-i)递增; 并且在第二读取阶段期间,通过基于第一和第二控制信号和第二组递增速率来控制所述第一计数器(220-i)递增的速率,生成作为像素值的函数的第二数字值, 所述第一和第二增量率集合各自定义所述第一和第二控制信号的多个状态中的每一个的增量率,其中所述第一组递增速率与所述第二组递增速率不同。

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